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SubjectRe: [PATCH v10 3/6] usb: dwc3: Resize TX FIFOs to meet EP bursting requirements
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On 6/17/2021 4:10 AM, Greg KH wrote:
> On Thu, Jun 17, 2021 at 02:58:16AM -0700, Wesley Cheng wrote:
>> +static int dwc3_gadget_check_config(struct usb_gadget *g, unsigned long ep_map)
>> +{
>> + struct dwc3 *dwc = gadget_to_dwc(g);
>> + unsigned long in_ep_map;
>> + int fifo_size = 0;
>> + int ram1_depth;
>> + int ep_num;
>> +
>> + if (!dwc->do_fifo_resize)
>> + return 0;
>> +
>> + /* Only interested in the IN endpoints */
>> + in_ep_map = ep_map >> 16;

Hi Greg,

>
> Wait, this "map" is split up into 16/16 somehow? So it's only 32bits
> big?
>

Yes, correct. Upper 16 carries IN eps, lower 16 carries OUT eps. Will
fix that based off your other comment.

> Where did you document this map structure? Why is it needed at all, you
> have the gadget, don't you have access to the full list of endpoints
> here as well?
>
> confused,
>

Unfortunately, we do not have the entire list of endpoints for each
function until the composite driver receives the SET_CONFIG packet from
the host. By this time, if we incorrectly allowed the configuration to
start enumeration w/ the host, and there were some EPs which have no
FIFO memory allocated, that would lead to those interfaces/functions
being broken.

The USB UDC driver does have the in_epnum and out_epnum, but those are
currently only being incremented in case we don't match EPs by string.
(in usb_ep_autoconfig_ss())

Thanks
Wesley Cheng

> greg k-h
>

--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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