Messages in this thread | | | Date | Mon, 21 Jun 2021 15:02:05 -0300 | From | Jason Gunthorpe <> | Subject | Re: [PATCH v2 rdma-next] RDMA/mlx5: Enable Relaxed Ordering by default for kernel ULPs |
| |
On Wed, Jun 09, 2021 at 02:05:03PM +0300, Leon Romanovsky wrote: > From: Avihai Horon <avihaih@nvidia.com> > > Relaxed Ordering is a capability that can only benefit users that support > it. All kernel ULPs should support Relaxed Ordering, as they are designed > to read data only after observing the CQE and use the DMA API correctly. > > Hence, implicitly enable Relaxed Ordering by default for kernel ULPs. > > Signed-off-by: Avihai Horon <avihaih@nvidia.com> > Signed-off-by: Leon Romanovsky <leonro@nvidia.com> > --- > Changelog: > v2: > * Dropped IB/core patch and set RO implicitly in mlx5 exactly like in > eth side of mlx5 driver. > v1: https://lore.kernel.org/lkml/cover.1621505111.git.leonro@nvidia.com > * Enabled by default RO in IB/core instead of changing all users > v0: https://lore.kernel.org/lkml/20210405052404.213889-1-leon@kernel.org > --- > drivers/infiniband/hw/mlx5/mr.c | 10 ++++++---- > drivers/infiniband/hw/mlx5/wr.c | 5 ++++- > 2 files changed, 10 insertions(+), 5 deletions(-)
Applied to for-next, with the extra comment, thanks
Someone is working on dis-entangling the access flags? It took a long time to sort out that this mess in wr.c actually does have a distinct user/kernel call chain too..
Jason
| |