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Subject[RFC PATCH 3/9] dt-bindings: phy: Add SEC DSIM DPHY bindings
Date
Samsung SEC MIPI DSIM DPHY controller is part of registers
available in SEC MIPI DSIM bridge for NXP's i.MX8M Mini and
Nano Processors.

Add dt-bingings for it.

Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
.../bindings/phy/samsung,sec-dsim-dphy.yaml | 56 +++++++++++++++++++
1 file changed, 56 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/samsung,sec-dsim-dphy.yaml

diff --git a/Documentation/devicetree/bindings/phy/samsung,sec-dsim-dphy.yaml b/Documentation/devicetree/bindings/phy/samsung,sec-dsim-dphy.yaml
new file mode 100644
index 000000000000..c5770c8035e1
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/samsung,sec-dsim-dphy.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/samsung,sec-dsim-dphy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung SEC MIPI DSIM DPHY controller on i.MX8M Mini and Nano SoCs
+
+maintainers:
+ - Jagan Teki <jagan@amarulasolutions.com>
+
+properties:
+ "#phy-cells":
+ const: 0
+
+ compatible:
+ enum:
+ - fsl,imx8mm-sec-dsim-dphy
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Phy Ref Clock
+
+ clock-names:
+ items:
+ - const: phy_ref
+
+ power-domains:
+ maxItems: 1
+ description: phandle to the associated power domain
+
+required:
+ - "#phy-cells"
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx8mm-clock.h>
+ #include <dt-bindings/power/imx8mm-power.h>
+
+ dphy: dphy@32e100a4 {
+ compatible = "fsl,imx8mm-sec-dsim-dphy";
+ reg = <0x32e100a4 0xbc>;
+ clocks = <&clk IMX8MM_CLK_DSI_PHY_REF>;
+ clock-names = "phy_ref";
+ power-domains = <&dispmix_blk_ctl IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DPHY>;
+ #phy-cells = <0>;
+ };
--
2.25.1
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