Messages in this thread | | | Date | Wed, 2 Jun 2021 16:58:43 +0100 | From | "Russell King (Oracle)" <> | Subject | Re: [PATCH v2 7/7] ARM: mm: Fix PXN process with LPAE feature |
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On Wed, Jun 02, 2021 at 11:13:14PM +0800, Kefeng Wang wrote: > IFSR format when using the Short-descriptor translation table format > > Domain fault 01001 First level 01011 Second level > > Permission fault 01101 First level 01111 Second level > > IFSR format when using the Long-descriptor translation table format > > 0011LL Permission fault. LL bits indicate levelb. > > After check the ARM spec, I think for the permission fault, we should panic > with or without LPAE, will change to
As I explained in one of the previous patches, the page tables that get used for mapping kernel space are the _tasks_ own page tables. Any new kernel mappings are lazily copied to the task page tables - such as when a module is loaded.
The first time we touch a page, we could end up with a page translation fault. This will call do_page_fault(), and so with your proposal, loading a module will potentially cause a kernel panic in this case, probably leading to systems that panic early during userspace boot.
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