Messages in this thread | | | From | Emil Renner Berthing <> | Date | Sun, 13 Jun 2021 01:23:03 +0200 | Subject | Re: [PATCH v4 1/4] riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED |
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On Fri, 4 Jun 2021 at 13:51, Alexandre Ghiti <alex@ghiti.fr> wrote: > > Make the physical RAM base address available for all kernels, not only > XIP kernels as it will allow to simplify address conversions macros.
Am I just reading it wrong or won't this patch make it so that the same kernel can't run on two chips with physical ram starting at different addresses?
/Emil
> --- > arch/riscv/Kconfig | 6 ------ > 1 file changed, 6 deletions(-) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index b58596b141fc..3d8e7e4bb45c 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -493,13 +493,8 @@ config STACKPROTECTOR_PER_TASK > def_bool y > depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS > > -config PHYS_RAM_BASE_FIXED > - bool "Explicitly specified physical RAM address" > - default n > - > config PHYS_RAM_BASE > hex "Platform Physical RAM address" > - depends on PHYS_RAM_BASE_FIXED > default "0x80000000" > help > This is the physical address of RAM in the system. It has to be > @@ -512,7 +507,6 @@ config XIP_KERNEL > # This prevents XIP from being enabled by all{yes,mod}config, which > # fail to build since XIP doesn't support large kernels. > depends on !COMPILE_TEST > - select PHYS_RAM_BASE_FIXED > help > Execute-In-Place allows the kernel to run from non-volatile storage > directly addressable by the CPU, such as NOR flash. This saves RAM > -- > 2.30.2 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
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