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    SubjectRe: [PATCH v6 01/17] dt-bindings: mfd: axp20x: Add AXP305 compatible (plus optional IRQ)
    On Wed, May 19, 2021 at 11:41:36AM +0100, Andre Przywara wrote:
    > The AXP305 PMIC used in AXP805 seems to be fully compatible to the
    > AXP805 PMIC, so add the proper chain of compatible strings.
    >
    > Also at least on one board (Orangepi Zero2) there is no interrupt line
    > connected to the CPU, so make the "interrupts" property optional.
    >
    > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
    > ---
    > Documentation/devicetree/bindings/mfd/axp20x.txt | 3 ++-
    > 1 file changed, 2 insertions(+), 1 deletion(-)

    Don't you want to convert this to schema? It's one of the last warnings
    for sunxi IIRC.

    Acked-by: Rob Herring <robh@kernel.org>

    >
    > diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
    > index 4991a6415796..4fd748101e3c 100644
    > --- a/Documentation/devicetree/bindings/mfd/axp20x.txt
    > +++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
    > @@ -26,10 +26,10 @@ Required properties:
    > * "x-powers,axp803"
    > * "x-powers,axp806"
    > * "x-powers,axp805", "x-powers,axp806"
    > + * "x-powers,axp803", "x-powers,axp805", "x-powers,axp806"
    > * "x-powers,axp809"
    > * "x-powers,axp813"
    > - reg: The I2C slave address or RSB hardware address for the AXP chip
    > -- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
    > - interrupt-controller: The PMIC has its own internal IRQs
    > - #interrupt-cells: Should be set to 1
    >
    > @@ -43,6 +43,7 @@ more information:
    > AXP20x/LDO3: software-based implementation
    >
    > Optional properties:
    > +- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
    > - x-powers,dcdc-freq: defines the work frequency of DC-DC in KHz
    > AXP152/20X: range: 750-1875, Default: 1.5 MHz
    > AXP22X/8XX: range: 1800-4050, Default: 3 MHz
    > --
    > 2.17.5
    >

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