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    Subject[PATCH 5.10 046/289] pinctrl: samsung: use int for register masks in Exynos
    Date
    From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>

    [ Upstream commit fa0c10a5f3a49130dd11281aa27e7e1c8654abc7 ]

    The Special Function Registers on all Exynos SoC, including ARM64, are
    32-bit wide, so entire driver uses matching functions like readl() or
    writel(). On 64-bit ARM using unsigned long for register masks:
    1. makes little sense as immediately after bitwise operation it will be
    cast to 32-bit value when calling writel(),
    2. is actually error-prone because it might promote other operands to
    64-bit.

    Addresses-Coverity: Unintentional integer overflow
    Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
    Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
    Link: https://lore.kernel.org/r/20210408195029.69974-1-krzysztof.kozlowski@canonical.com
    Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/pinctrl/samsung/pinctrl-exynos.c | 10 +++++-----
    1 file changed, 5 insertions(+), 5 deletions(-)

    diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
    index b9ea09fabf84..493079a47d05 100644
    --- a/drivers/pinctrl/samsung/pinctrl-exynos.c
    +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
    @@ -55,7 +55,7 @@ static void exynos_irq_mask(struct irq_data *irqd)
    struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip);
    struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
    unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset;
    - unsigned long mask;
    + unsigned int mask;
    unsigned long flags;

    spin_lock_irqsave(&bank->slock, flags);
    @@ -83,7 +83,7 @@ static void exynos_irq_unmask(struct irq_data *irqd)
    struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip);
    struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
    unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset;
    - unsigned long mask;
    + unsigned int mask;
    unsigned long flags;

    /*
    @@ -483,7 +483,7 @@ static void exynos_irq_eint0_15(struct irq_desc *desc)
    chained_irq_exit(chip, desc);
    }

    -static inline void exynos_irq_demux_eint(unsigned long pend,
    +static inline void exynos_irq_demux_eint(unsigned int pend,
    struct irq_domain *domain)
    {
    unsigned int irq;
    @@ -500,8 +500,8 @@ static void exynos_irq_demux_eint16_31(struct irq_desc *desc)
    {
    struct irq_chip *chip = irq_desc_get_chip(desc);
    struct exynos_muxed_weint_data *eintd = irq_desc_get_handler_data(desc);
    - unsigned long pend;
    - unsigned long mask;
    + unsigned int pend;
    + unsigned int mask;
    int i;

    chained_irq_enter(chip, desc);
    --
    2.30.2


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