lkml.org 
[lkml]   [2021]   [May]   [12]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 5.11 565/601] arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E
    Date
    From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

    [ Upstream commit dcabb06bf127b3e0d3fbc94a2b65dd56c2725851 ]

    UniPhier LD20 and PXs3 boards have RTL8211E ethernet phy, and the phy have
    the RX/TX delays of RGMII interface using pull-ups on the RXDLY and TXDLY
    pins.

    After the commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx
    delay config"), the delays are working correctly, however, "rgmii" means
    no delay and the phy doesn't work. So need to set the phy-mode to
    "rgmii-id" to show that RX/TX delays are enabled.

    Fixes: c73730ee4c9a ("arm64: dts: uniphier: add AVE ethernet node")
    Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 +-
    arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 4 ++--
    2 files changed, 3 insertions(+), 3 deletions(-)

    diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
    index a87b8a678719..8f2c1c1e2c64 100644
    --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
    +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
    @@ -734,7 +734,7 @@
    clocks = <&sys_clk 6>;
    reset-names = "ether";
    resets = <&sys_rst 6>;
    - phy-mode = "rgmii";
    + phy-mode = "rgmii-id";
    local-mac-address = [00 00 00 00 00 00];
    socionext,syscon-phy-mode = <&soc_glue 0>;

    diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
    index 0e52dadf54b3..be97da132258 100644
    --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
    +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
    @@ -564,7 +564,7 @@
    clocks = <&sys_clk 6>;
    reset-names = "ether";
    resets = <&sys_rst 6>;
    - phy-mode = "rgmii";
    + phy-mode = "rgmii-id";
    local-mac-address = [00 00 00 00 00 00];
    socionext,syscon-phy-mode = <&soc_glue 0>;

    @@ -585,7 +585,7 @@
    clocks = <&sys_clk 7>;
    reset-names = "ether";
    resets = <&sys_rst 7>;
    - phy-mode = "rgmii";
    + phy-mode = "rgmii-id";
    local-mac-address = [00 00 00 00 00 00];
    socionext,syscon-phy-mode = <&soc_glue 1>;

    --
    2.30.2


    \
     
     \ /
      Last update: 2021-05-12 20:02    [W:2.620 / U:0.640 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site