Messages in this thread | | | Subject | Re: [PATCH net-next v7 7/9] net: phy: Add support for microchip SMI0 MDIO bus | From | Florian Fainelli <> | Date | Mon, 26 Apr 2021 11:23:55 -0700 |
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On 4/26/21 6:19 AM, Oleksij Rempel wrote: > From: Andrew Lunn <andrew@lunn.ch> > > SMI0 is a mangled version of MDIO. The main low level difference is > the MDIO C22 OP code is always 0, not 0x2 or 0x1 for Read/Write. The > read/write information is instead encoded in the PHY address. > > Extend the bit-bang code to allow the op code to be overridden, but > default to normal C22 values. Add an extra compatible to the mdio-gpio > driver, and when this compatible is present, set the op codes to 0. > > A higher level driver, sitting on top of the basic MDIO bus driver can > then implement the rest of the microchip SMI0 odderties. > > Signed-off-by: Andrew Lunn <andrew@lunn.ch> > Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> > Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> -- Florian
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