Messages in this thread | | | From | Fabio Estevam <> | Date | Tue, 20 Apr 2021 11:27:05 -0300 | Subject | Re: [PATCH v3 3/4] arm: dts: imx: Add i.mx6q DaSheng COM-9XX SBC board support |
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Hi Dillon,
On Thu, Apr 15, 2021 at 1:05 AM <dillon.minfei@gmail.com> wrote:
> + green { > + gpios = <&gpio4 8 0>;
Please use GPIO_ACTIVE_HIGH label instead: gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
> +&clks { > + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, > + <&clks IMX6QDL_CLK_LDB_DI1_SEL>; > + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, > + <&clks IMX6QDL_CLK_PLL3_USB_OTG>; > +};
You are setting the LDB clock parent, but you don't use LDB in this devicetree. You could simply remove this.
> +&ecspi1 { > + cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ecspi1>; > + status = "okay"; > + > + flash: m25p80@0 {
Node names should be generic:
m25p80: flash@0
> +&iomuxc { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_hog>; > + > + imx6qdl-ds { > + pinctrl_hog: hoggrp { > + fsl,pins = < > + MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 > + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 > + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
This could be part of the pinctrl_ov2659 group as it provides the clock for the camera.
Please try to keep in the hoggrp only the pins that cannot be controlled by any other node.
> +&wdog1 { > + status = "okay"; > +}; > + > +&wdog2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_wdog>; > + fsl,ext-reset-output; > + status = "disabled";
Wouldn't it be better to enable wdog2 and disable wdog1 instead? wdog2 provides a POR, which is preferred.
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