Messages in this thread | | | From | Valentin Schneider <> | Subject | Re: [PATCH v2 0/1] arm: topology: parse the topology from the dt | Date | Fri, 16 Apr 2021 11:47:29 +0100 |
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On 16/04/21 12:39, Dietmar Eggemann wrote: > On 16/04/2021 11:32, Valentin Schneider wrote: >> On 16/04/21 15:47, Ruifeng Zhang wrote: >>> For more requirements, if all cores in one physical cluster, the >>> {aff2} of all cores are the same value. >>> i.e. the sc9863a, >>> core0: 0000000081000000 >>> core1: 0000000081000100 >>> core2: 0000000081000200 >>> core3: 0000000081000300 >>> core4: 0000000081000400 >>> core5: 0000000081000500 >>> core6: 0000000081000600 >>> core7: 0000000081000700 >>> >>> According to MPIDR all cores will parse to the one cluster, but it's >>> the big.LITTLE system, it's need two logic cluster for schedule or >>> cpufreq. >>> So I think it's better to add the logic of parse topology from DT. >> >> Ah, so it's a slightly different issue, but still one that requires a >> different means of specifying topology. > > I'm confused. Do you have the MT bit set to 1 then? So the issue that > the mpidr handling in arm32's store_cpu_topology() is not correct does > not exist? > > With DynamIQ you have only *one* cluster, you should also be able to run > your big.LITTLE system with only an MC sched domain. > > # cat /proc/schedstat > cpu0 .... > domain0 ff ... <- MC > ... >
You're right, this is actually a DynamIQ system, not a (legacy) big.LITTLE one, so all CPUs are under the same LLC (the DSU). I probably should have checked this earlier on, but this is quite obvious from sc9863a.dtsi:
cpu-map { cluster0 { core0 { cpu = <&CPU0>; }; core1 { cpu = <&CPU1>; }; core2 { cpu = <&CPU2>; }; core3 { cpu = <&CPU3>; }; core4 { cpu = <&CPU4>; }; core5 { cpu = <&CPU5>; }; core6 { cpu = <&CPU6>; }; core7 { cpu = <&CPU7>; }; }; };
All CPUs are in the same cluster, and the MPIDR values actually match that.
> You can introduce a cpu-map to create what we called Phantom Domains in > Android products. > > # cat /proc/schedstat > > cpu0 .... > domain0 0f ... <- MC > domain1 ff ... < DIE > > Is this what you need for your arm32 kernel system? Adding the > possibility to parse cpu-map to create Phantom Domains?
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