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SubjectRe: [PATCH v2 0/6] NVIDIA Tegra memory improvements
Date
On Wed, 31 Mar 2021 02:04:39 +0300, Dmitry Osipenko wrote:
> This series replaces the raw voltage regulator with a power domain that
> will be managing SoC core voltage. The core power domain patches are still
> under review, but it's clear at this point that this is the way we will
> implement the DVFS support.
>
> The remaining Tegra20 memory bindings are converted to schema. I also
> made a small improvement to the memory drivers.
>
> [...]

Applied, thanks!

[1/6] dt-bindings: memory: tegra20: emc: Replace core regulator with power domain
commit: d46cf7106c4979117e108336dfadcaf57d23f9ed
[2/6] dt-bindings: memory: tegra30: emc: Replace core regulator with power domain
commit: c19137a97e39a9cdf24c9feb580af4564997c1f9
[3/6] dt-bindings: memory: tegra124: emc: Replace core regulator with power domain
commit: 749d01cd0b796adb69d68e9079520f4f95b17cd2
[6/6] memory: tegra: Print out info-level once per driver probe
commit: 06949d1d9accbc7d3a029536650162bbca30151b

Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>

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