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SubjectRe: [PATCH v2 3/3] arm64: dts: ti: k3-j7200-som-p0: Add nodes for OSPI0
On 21:09-20210305, Pratyush Yadav wrote:
> TI J7200 has the Cadence OSPI controller for interfacing with OSPI
> flashes. Add its node to allow using SPI flashes.
>
> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
> ---
>
> Notes:
> Changes in v2:
> - Do not force a pulldown on the DQS line because it already has a
> pulldown resistor.
>
> .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 17 +++++++++
> arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 36 +++++++++++++++++++
> 2 files changed, 53 insertions(+)

I see this with dtbs_check on v5.12-rc2:

/workdir/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dt.yaml: flash@0: 'cdns,read-delay', 'cdns,tchsh-ns', 'cdns,tsd2d-ns', 'cdns,tshsl-ns', 'cdns,tslch-ns' do not match any of the regexes: '^partition@', 'pinctrl-[0-9]+'

--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D

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