Messages in this thread | | | Date | Mon, 8 Mar 2021 11:58:38 +0800 | From | kernel test robot <> | Subject | Re: [PATCH v4] RISC-V: enable XIP |
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Hi Vitaly,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master] [also build test ERROR on v5.12-rc2] [cannot apply to linux/master] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Vitaly-Wool/RISC-V-enable-XIP/20210307-103904 base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 280d542f6ffac0e6d65dc267f92191d509b13b64 config: riscv-allmodconfig (attached as .config) compiler: riscv64-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/c9cb15092dcf53140fba57780677a9dcaef70612 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Vitaly-Wool/RISC-V-enable-XIP/20210307-103904 git checkout c9cb15092dcf53140fba57780677a9dcaef70612 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=riscv
If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> riscv64-linux-ld: section .data LMA [0000000000800000,0000000000a90eaf] overlaps section .text LMA [00000000001095a0,00000000014ae61b] >> riscv64-linux-ld: section .rodata VMA [ffffffe000cae640,ffffffe001042f0f] overlaps section .bss VMA [ffffffe00059d000,ffffffe001a54f6f] riscv64-linux-ld: arch/riscv/mm/init.o: in function `.L122': >> init.c:(.text+0x288): undefined reference to `__init_text_begin' riscv64-linux-ld: arch/riscv/mm/init.o: in function `.L123': >> init.c:(.text+0x290): undefined reference to `__init_data_begin' riscv64-linux-ld: arch/riscv/mm/init.o: in function `.L0 ': init.c:(.text+0x2ea): undefined reference to `__init_text_begin' >> riscv64-linux-ld: init.c:(.text+0x302): undefined reference to `__init_data_begin'
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