Messages in this thread Patch in this message | | | From | Lucas Tanure <> | Subject | [PATCH v3 14/15] ASoC: cs42l42: Only start PLL if it is needed | Date | Sat, 6 Mar 2021 18:55:52 +0000 |
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From: Richard Fitzgerald <rf@opensource.cirrus.com>
The PLL is only needed for sclk < 11289600 Hz and cs42l42_pll_config() will not configure it for higher rates. So it must only be enabled when it is needed.
Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com> --- Changes in v3: - No changes
Changes in v2: - Lucas signed-off added
sound/soc/codecs/cs42l42.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c index 08718fd10fb9b..d7a314aa59b73 100644 --- a/sound/soc/codecs/cs42l42.c +++ b/sound/soc/codecs/cs42l42.c @@ -887,8 +887,9 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream) } else { if (!cs42l42->stream_use) { /* SCLK must be running before codec unmute */ - snd_soc_component_update_bits(component, CS42L42_PLL_CTL1, - CS42L42_PLL_START_MASK, 1); + if ((cs42l42->bclk < 11289600) && (cs42l42->sclk < 11289600)) + snd_soc_component_update_bits(component, CS42L42_PLL_CTL1, + CS42L42_PLL_START_MASK, 1); /* Mark SCLK as present, turn off internal oscillator */ regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_sclk_seq, -- 2.30.1
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