Messages in this thread Patch in this message | | | Date | Sat, 6 Mar 2021 14:14:42 +0100 | From | Ingo Molnar <> | Subject | Re: "struct perf_sample_data" alignment |
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* Alexei Starovoitov <alexei.starovoitov@gmail.com> wrote:
> > This seems to be it... (completely untested) > > > > --- > > diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h > > index 3f7f89ea5e51..918a296d2ca2 100644 > > --- a/include/linux/perf_event.h > > +++ b/include/linux/perf_event.h > > @@ -1032,7 +1032,9 @@ struct perf_sample_data { > > u64 cgroup; > > u64 data_page_size; > > u64 code_page_size; > > -} ____cacheline_aligned; > > +}; > > + > > +typedef struct perf_sample_data perf_sample_data_t ____cacheline_aligned; > > > > /* default value for data source */ > > #define PERF_MEM_NA (PERF_MEM_S(OP, NA) |\ > > diff --git a/kernel/trace/bpf_trace.c b/kernel/trace/bpf_trace.c > > index b0c45d923f0f..f32c623abef6 100644 > > --- a/kernel/trace/bpf_trace.c > > +++ b/kernel/trace/bpf_trace.c > > @@ -923,7 +923,7 @@ __bpf_perf_event_output(struct pt_regs *regs, struct bpf_map *map, > > * bpf_perf_event_output > > */ > > struct bpf_trace_sample_data { > > - struct perf_sample_data sds[3]; > > + perf_sample_data_t sds[3]; > > bpf side doesn't care about about cacheline aligned. > No need to add new typedef just for that.
So this structure is not supposed to be exposed to any ABI anywhere.
I did a (non-exhaustive) search of tooling, and there doesn't appear to be any accidental exposure.
The in-kernel ABI interaction appears to be the following:
- In __perf_event_header_size() we only use fields within perf_sample_data to size the header. Alignment won't change any of the output.
- Ditto in perf_event__id_header_size().
I.e. I think we should just zap it per the patch below (untested).
Thanks,
Ingo
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diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 3f7f89ea5e51..d75e03ff31ea 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -1032,7 +1032,7 @@ struct perf_sample_data { u64 cgroup; u64 data_page_size; u64 code_page_size; -} ____cacheline_aligned; +}; /* default value for data source */ #define PERF_MEM_NA (PERF_MEM_S(OP, NA) |\
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