Messages in this thread | | | Date | Tue, 30 Mar 2021 17:22:51 +0200 (CEST) | From | "Maciej W. Rozycki" <> | Subject | Re: How long should be PCIe card in Warm Reset state? |
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On Tue, 30 Mar 2021, Pali Rohár wrote:
> > The spec does not give any exceptions AFAICT as to the timeouts required > > between the three kinds of a Conventional Reset (Hot, Warm, or Cold) and > > refers to them collectively as a Conventional Reset across the relevant > > parts of the document, so clearly the same rules apply. > > There are specified more timeouts related to Warm reset and PERST# > signal. Just they are not in Base spec, but in CEM spec. See previous > Amey's email where are described some timeouts and also links in my > first email where I put other timeouts defined in specs relevant for > PERST# signal and therefore also for Warm Reset.
I specifically referred to the time allowed for devices to take between a reset and the first successful configuration cycle David wondered about. I don't think I can comment on the timeouts given in the CEM spec as I don't have a copy. Sorry.
Maciej
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