lkml.org 
[lkml]   [2021]   [Mar]   [24]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH v2 1/3] dt-bindings: imx6q-pcie: add one regulator used to power up pcie phy
Date
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
turned on.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
index de4b2baf91e8..3248b7192ced 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
@@ -38,6 +38,12 @@ Optional properties:
The regulator will be enabled when initializing the PCIe host and
disabled either as part of the init process or when shutting down the
host.
+- vph-supply: Should specify the regulator in charge of PCIe PHY power.
+ On i.MX8MQ, both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe
+ PHY. In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
+ sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design, the
+ VREG_BYPASS bits of GPR registers should be cleared from default value 1b'1
+ to 1b'0.

Additional required properties for imx6sx-pcie:
- clock names: Must include the following additional entries:
--
2.17.1
\
 
 \ /
  Last update: 2021-03-24 06:49    [W:0.065 / U:1.684 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site