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SubjectRe: enetc: fix bitfields, we are clearing wrong bits
On Sun, Mar 21, 2021 at 05:25:00PM +0100, Pavel Machek wrote:
> Bitfield manipulation in enetc_mac_config() looks wrong. Fix
> it. Untested.
>
> Signed-off-by: Pavel Machek (CIP) <pavel@denx.de>
>
> diff --git a/drivers/net/ethernet/freescale/enetc/enetc_pf.c b/drivers/net/ethernet/freescale/enetc/enetc_pf.c
> index 224fc37a6757..b85079493933 100644
> --- a/drivers/net/ethernet/freescale/enetc/enetc_pf.c
> +++ b/drivers/net/ethernet/freescale/enetc/enetc_pf.c
> @@ -505,7 +505,7 @@ static void enetc_mac_config(struct enetc_hw *hw, phy_interface_t phy_mode)
> if (phy_interface_mode_is_rgmii(phy_mode)) {
> val = enetc_port_rd(hw, ENETC_PM0_IF_MODE);
> val &= ~ENETC_PM0_IFM_EN_AUTO;
> - val &= ENETC_PM0_IFM_IFMODE_MASK;
> + val &= ~ENETC_PM0_IFM_IFMODE_MASK;
> val |= ENETC_PM0_IFM_IFMODE_GMII | ENETC_PM0_IFM_RG;
> enetc_port_wr(hw, ENETC_PM0_IF_MODE, val);
> }
>
> --
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

Fixes: c76a97218dcb ("net: enetc: force the RGMII speed and duplex instead of operating in inband mode")
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>

Note that for normal operation, the bug was inconsequential, due to the
fact that we write the IF_MODE register in two stages, first in
.phylink_mac_config (which incorrectly cleared out a bunch of stuff),
then we update the speed and duplex to the correct values in
.phylink_mac_link_up. Maybe loopback mode was broken.

Thanks!

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