Messages in this thread | | | Date | Sun, 21 Mar 2021 09:05:16 -0700 (PDT) | From | Randy Dunlap <> | Subject | Re: [PATCH] clk: renesas: Couple of spelling fixes |
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On Sun, 21 Mar 2021, Bhaskar Chowdhury wrote:
> > s/suposed/supposed/ > s/concurent/concurrent/ > > Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
> --- > drivers/clk/renesas/r9a06g032-clocks.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c > index 892e91b92f2c..1fe166e7f8bd 100644 > --- a/drivers/clk/renesas/r9a06g032-clocks.c > +++ b/drivers/clk/renesas/r9a06g032-clocks.c > @@ -279,7 +279,7 @@ static const struct r9a06g032_clkdesc r9a06g032_clocks[] = { > /* > * These are not hardware clocks, but are needed to handle the special > * case where we have a 'selector bit' that doesn't just change the > - * parent for a clock, but also the gate it's suposed to use. > + * parent for a clock, but also the gate it's supposed to use. > */ > { > .index = R9A06G032_UART_GROUP_012, > @@ -311,7 +311,7 @@ static const struct r9a06g032_clkdesc r9a06g032_clocks[] = { > > struct r9a06g032_priv { > struct clk_onecell_data data; > - spinlock_t lock; /* protects concurent access to gates */ > + spinlock_t lock; /* protects concurrent access to gates */ > void __iomem *reg; > }; > > -- > 2.30.1 > >
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