Messages in this thread | | | From | Thomas Gleixner <> | Subject | Re: [PATCH RFC 1/2] x86/apic: Do not make an exception for PIC_CASCADE_IR when marking legacy irqs in irq_matrix | Date | Thu, 18 Mar 2021 11:10:07 +0100 |
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On Thu, Mar 18 2021 at 09:29, Vitaly Kuznetsov wrote: > Thomas Gleixner <tglx@linutronix.de> writes: >> Out of paranoia I'd rather ignore that IO/APIC pin completely if it >> claims to be IRQ2. I assume there is no device connected to it at all, >> right? > > The original issue was observed on Amazon's r5d.xlarge instance > type. Your assumption seems to be correct, I don't see any device on > IRQ2. > >> >> Can you please provide a dmesg with apic=verbose on the command line? >> > > Here you go, attached.
> [ 0.931305] init IO_APIC IRQs > [ 0.931312] IOAPIC[0]: Preconfigured routing entry (0-0 -> IRQ 0 Level:0 ActiveLow:0) > [ 0.931316] IOAPIC[0]: Preconfigured routing entry (0-1 -> IRQ 1 Level:0 ActiveLow:0)
There you go:
> [ 0.931320] IOAPIC[0]: Preconfigured routing entry (0-2 -> IRQ 2 Level:0 ActiveLow:0)
Yet another virtualization feature :)
Thanks,
tglx
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