Messages in this thread | | | From | "Tian, Kevin" <> | Subject | RE: A problem of Intel IOMMU hardware ? | Date | Thu, 18 Mar 2021 08:27:12 +0000 |
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> From: iommu <iommu-bounces@lists.linux-foundation.org> On Behalf Of > Longpeng (Mike, Cloud Infrastructure Service Product Dept.) > > > 2. Consider ensuring that the problem is not somehow related to queued > > invalidations. Try to use __iommu_flush_iotlb() instead of qi_flush_iotlb(). > > > > I tried to force to use __iommu_flush_iotlb(), but maybe something wrong, > the system crashed, so I prefer to lower the priority of this operation. >
The VT-d spec clearly says that register-based invalidation can be used only when queued-invalidations are not enabled. Intel-IOMMU driver doesn't provide an option to disable queued-invalidation though, when the hardware is capable. If you really want to try, tweak the code in intel_iommu_init_qi.
Thanks Kevin
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