Messages in this thread | | | Date | Wed, 17 Mar 2021 14:19:27 -0700 | From | Sean Christopherson <> | Subject | Re: [PATCH] x86/cpu/AMD: Adjust x86_phys_bits to account for reduced PA in SEV-* guests |
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On Wed, Mar 17, 2021, Sean Christopherson wrote: > On Wed, Mar 17, 2021, Borislav Petkov wrote: > > IOW, you have c_bit so your valid address space is [0 .. c_bit-1] no? > > I haven't found anything in the GHCB that dictates that MAXPHYADDR == C_BIT-1, > or more specifically that MAXPHYADDR == C_BIT - PhysAddrReduction. E.g. AFAICT, > a VMM could do C_BIT=47, MAXPHYADDR=36, PhysAddrReduction=0, and that would be > allowed by the GHCB. > > Forcing "c->x86_phys_bits = c_bit - 1" doesn't seem like it would break anything, > but it's also technically wrong.
On the other hand, "C_BIT=47, MAXPHYADDR=36, PhysAddrReduction=0" would mean the C-bit is an illegal PA bit from the guest's perspective. That's rather nonsensical, but also not technically disallowed by the APM or GHCB specs.
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