Messages in this thread Patch in this message | | | From | Mate Toth-Pal <> | Subject | Re: [PATCH v5 33/36] KVM: arm64: Wrap the host with a stage 2 | Date | Tue, 16 Mar 2021 13:28:42 +0100 |
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On 2021-03-15 15:35, Quentin Perret wrote: > +static int host_stage2_idmap(u64 addr) > +{ > + enum kvm_pgtable_prot prot = KVM_PGTABLE_PROT_R | KVM_PGTABLE_PROT_W; > + struct kvm_mem_range range; > + bool is_memory = find_mem_range(addr, &range); > + struct hyp_pool *pool = is_memory ? &host_s2_mem : &host_s2_dev; > + int ret; > + > + if (is_memory) > + prot |= KVM_PGTABLE_PROT_X; > + > /* Ensure write of the host VMID */
Hi Quentin,
Testing the latest version of the patchset, we seem to have found another thing related to FEAT_S2FWB.
This function always sets Normal memory in the stage 2 table, even if the address in stage 1 was mapped as a device memory. However with the current settings for normal memory (i.e. MT_S2_FWB_NORMAL being defined to 6) according to the architecture (See Arm ARM, 'D5.5.5 Stage 2 memory region type and cacheability attributes when FEAT_S2FWB is implemented') the resulting attributes will be 'Normal Write-Back' even if the stage 1 mapping sets device memory. Accessing device memory mapped like this causes an SError on some platforms with FEAT_S2FWB being implemented.
Changing the value of MT_S2_FWB_NORMAL to 7 would change this behavior, and the resulting memory type would be device.
Another solution would be to add an else branch to the last 'if' above like this:
diff --git a/arch/arm64/kvm/hyp/nvhe/mem_protect.c b/arch/arm64/kvm/hyp/nvhe/mem_protect.c index fffa432ce3eb..54e5d3b0b2e1 100644 --- a/arch/arm64/kvm/hyp/nvhe/mem_protect.c +++ b/arch/arm64/kvm/hyp/nvhe/mem_protect.c @@ -214,6 +214,8 @@ static int host_stage2_idmap(u64 addr)
if (is_memory) prot |= KVM_PGTABLE_PROT_X; + else + prot |= KVM_PGTABLE_PROT_DEVICE;
hyp_spin_lock(&host_kvm.lock); ret = kvm_pgtable_stage2_find_range(&host_kvm.pgt, addr, prot, &range); Best regards, Mate Toth-Pal
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