Messages in this thread | | | Subject | Re: [PATCH 2/2] KVM: nSVM: improve SYSENTER emulation on AMD | From | Maxim Levitsky <> | Date | Mon, 15 Mar 2021 20:19:09 +0200 |
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On Mon, 2021-03-15 at 18:56 +0100, Paolo Bonzini wrote: > On 15/03/21 18:43, Maxim Levitsky wrote: > > + if (!guest_cpuid_is_intel(vcpu)) { > > + /* > > + * If hardware supports Virtual VMLOAD VMSAVE then enable it > > + * in VMCB and clear intercepts to avoid #VMEXIT. > > + */ > > + if (vls) { > > + svm_clr_intercept(svm, INTERCEPT_VMLOAD); > > + svm_clr_intercept(svm, INTERCEPT_VMSAVE); > > + svm->vmcb->control.virt_ext |= VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK; > > + } > > + /* No need to intercept these msrs either */ > > + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_SYSENTER_EIP, 1, 1); > > + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_SYSENTER_ESP, 1, 1); > > + } > > An "else" is needed here to do the opposite setup (removing the "if > (vls)" from init_vmcb).
init_vmcb currently set the INTERCEPT_VMLOAD and INTERCEPT_VMSAVE and it doesn't enable vls thus there is nothing to do if I don't want to enable vls. It seems reasonable to me.
Both msrs I marked as '.always = false' in the 'direct_access_msrs', which makes them be intercepted by the default. If I were to use '.always = true' it would feel a bit wrong as the intercept is not always enabled.
What do you think?
> > This also makes the code more readable since you can write > > if (guest_cpuid_is_intel(vcpu)) { > /* > * We must intercept SYSENTER_EIP and SYSENTER_ESP > * accesses because the processor only stores 32 bits. > * For the same reason we cannot use virtual > * VMLOAD/VMSAVE. > */ > ... > } else { > /* Do the opposite. */ > ... > }
Best regards, Maxim Levitsky
> > Paolo >
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