Messages in this thread | ![/](/images/icornerl.gif) | | Subject | Re: [PATCH RFC v1 04/15] iommu/arm-smmu-v3: Update CD base address info for user-space | From | Vivek Kumar Gautam <> | Date | Fri, 12 Mar 2021 18:01:28 +0530 |
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Hi Jean,
On 3/3/21 10:44 PM, Jean-Philippe Brucker wrote: > On Fri, Jan 15, 2021 at 05:43:31PM +0530, Vivek Gautam wrote: >> Update base address information in vendor pasid table info to pass that >> to user-space for stage1 table management. >> >> Signed-off-by: Vivek Gautam <vivek.gautam@arm.com> >> Cc: Joerg Roedel <joro@8bytes.org> >> Cc: Will Deacon <will.deacon@arm.com> >> Cc: Robin Murphy <robin.murphy@arm.com> >> Cc: Jean-Philippe Brucker <jean-philippe@linaro.org> >> Cc: Eric Auger <eric.auger@redhat.com> >> Cc: Alex Williamson <alex.williamson@redhat.com> >> Cc: Kevin Tian <kevin.tian@intel.com> >> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> >> Cc: Liu Yi L <yi.l.liu@intel.com> >> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> >> Cc: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com> >> --- >> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c >> index 8a7187534706..ec37476c8d09 100644 >> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c >> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c >> @@ -55,6 +55,9 @@ static __le64 *arm_smmu_get_cd_ptr(struct iommu_vendor_psdtable_cfg *pst_cfg, >> if (arm_smmu_alloc_cd_leaf_table(dev, l1_desc)) >> return NULL; >> >> + if (s1cfg->s1fmt == STRTAB_STE_0_S1FMT_LINEAR) >> + pst_cfg->base = l1_desc->l2ptr_dma; >> + > > This isn't the right place, because this path allocates second-level > tables for two-level tables. I don't think we need pst_cfg->base at all, > because for both linear and two-level tables, the base pointer is in > cdcfg->cdtab_dma, which can be read directly.
Sure, will remove this.
> > Thanks, > Jean > >> l1ptr = cdcfg->cdtab + idx * CTXDESC_L1_DESC_DWORDS; >> arm_smmu_write_cd_l1_desc(l1ptr, l1_desc); >> /* An invalid L1CD can be cached */ >> @@ -211,6 +214,9 @@ static int arm_smmu_alloc_cd_tables(struct iommu_vendor_psdtable_cfg *pst_cfg) >> goto err_free_l1; >> } >> >> + if (s1cfg->s1fmt == STRTAB_STE_0_S1FMT_64K_L2) >> + pst_cfg->base = cdcfg->cdtab_dma; >> + >> return 0; >> >> err_free_l1: >> -- >> 2.17.1 >>
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