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    SubjectRe: [PATCH v6 01/22] dt-bindings: ARM: Mediatek: Add new document bindings of imp i2c wrapper controller
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    On Wed, 2021-02-10 at 13:19 +0100, Matthias Brugger wrote:
    >
    > On 22/12/2020 14:09, Weiyi Lu wrote:
    > > This patch adds the new binding documentation of imp i2c wrapper controller
    > > for Mediatek MT8192.
    >
    > The wrapper controller has only clock parts, or are the clock register mapped
    > into the i2c wrapper block. In that case we might want to probe the clock driver
    > through the i2c wrapper driver.
    >
    > Regards,
    > Matthias
    >

    Yes, the clock registers are mapped into partial of the i2c wrapper
    block.
    AFAIK, the i2c wrapper works with the i2c
    driver(i2c/busses/i2c-mt65xx.c) but not a new driver.
    So do you still suggest us to probe the clock driver through the i2c
    driver(i2c/busses/i2c-mt65xx.c) just like the mtk-mm driver?

    > >
    > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
    > > ---
    > > .../arm/mediatek/mediatek,imp_iic_wrap.yaml | 78 ++++++++++++++++++++++
    > > 1 file changed, 78 insertions(+)
    > > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml
    > >
    > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml
    > > new file mode 100644
    > > index 0000000..5d0cf37
    > > --- /dev/null
    > > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml
    > > @@ -0,0 +1,78 @@
    > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
    > > +%YAML 1.2
    > > +---
    > > +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,imp_iic_wrap.yaml#
    > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
    > > +
    > > +title: MediaTek IMP I2C Wrapper Controller
    > > +
    > > +maintainers:
    > > + - Weiyi Lu <weiyi.lu@mediatek.com>
    > > +
    > > +description:
    > > + The Mediatek imp i2c wrapper controller provides functional configurations and clocks to the system.
    > > +
    > > +properties:
    > > + compatible:
    > > + items:
    > > + - enum:
    > > + - mediatek,mt8192-imp_iic_wrap_c
    > > + - mediatek,mt8192-imp_iic_wrap_e
    > > + - mediatek,mt8192-imp_iic_wrap_s
    > > + - mediatek,mt8192-imp_iic_wrap_ws
    > > + - mediatek,mt8192-imp_iic_wrap_w
    > > + - mediatek,mt8192-imp_iic_wrap_n
    > > + - const: syscon
    > > +
    > > + reg:
    > > + maxItems: 1
    > > +
    > > + '#clock-cells':
    > > + const: 1
    > > +
    > > +required:
    > > + - compatible
    > > + - reg
    > > +
    > > +examples:
    > > + - |
    > > + imp_iic_wrap_c: syscon@11007000 {
    > > + compatible = "mediatek,mt8192-imp_iic_wrap_c", "syscon";
    > > + reg = <0 0x11007000 0 0x1000>;
    > > + #clock-cells = <1>;
    > > + };
    > > +
    > > + - |
    > > + imp_iic_wrap_e: syscon@11cb1000 {
    > > + compatible = "mediatek,mt8192-imp_iic_wrap_e", "syscon";
    > > + reg = <0 0x11cb1000 0 0x1000>;
    > > + #clock-cells = <1>;
    > > + };
    > > +
    > > + - |
    > > + imp_iic_wrap_s: syscon@11d03000 {
    > > + compatible = "mediatek,mt8192-imp_iic_wrap_s", "syscon";
    > > + reg = <0 0x11d03000 0 0x1000>;
    > > + #clock-cells = <1>;
    > > + };
    > > +
    > > + - |
    > > + imp_iic_wrap_ws: syscon@11d23000 {
    > > + compatible = "mediatek,mt8192-imp_iic_wrap_ws", "syscon";
    > > + reg = <0 0x11d23000 0 0x1000>;
    > > + #clock-cells = <1>;
    > > + };
    > > +
    > > + - |
    > > + imp_iic_wrap_w: syscon@11e01000 {
    > > + compatible = "mediatek,mt8192-imp_iic_wrap_w", "syscon";
    > > + reg = <0 0x11e01000 0 0x1000>;
    > > + #clock-cells = <1>;
    > > + };
    > > +
    > > + - |
    > > + imp_iic_wrap_n: syscon@11f02000 {
    > > + compatible = "mediatek,mt8192-imp_iic_wrap_n", "syscon";
    > > + reg = <0 0x11f02000 0 0x1000>;
    > > + #clock-cells = <1>;
    > > + };
    > >
    >
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