Messages in this thread | | | Date | Wed, 08 Dec 2021 08:25:45 +0000 | From | Marc Zyngier <> | Subject | Re: [PATCH] irqchip/irq-gic-v3-its.c: Return its_invall_cmd.col when building INVALL |
| |
On 2021-12-08 01:54, Shaokun Zhang wrote: > From: Wudi Wang <wangwudi@hisilicon.com> > > INVALL CMD specifies that the ITS must ensure any caching associated > with > the interrupt collection defined by ICID is consistent with the LPI > configuration tables held in memory for all Redistributors. SYNC is > required to ensure that INVALL is executed.
The patch title doesn't quite spell out the issue. It should say something like:
"Force synchronisation when issuing INVALL"
> > Currently, LPI configuration data may be inconsistent with that in the > memory within a short period of time after the INVALL command is > executed.
I'm curious: have you seen any issue with this on actual HW? In my experience, all implementations treat INVALL as a synchronous command,
Or was this solely done via inspection?
> > Cc: Thomas Gleixner <tglx@linutronix.de> > Cc: Marc Zyngier <maz@kernel.org> > Signed-off-by: Wudi Wang <wangwudi@hisilicon.com> > Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
This needs:
Fixes: cc2d3216f53 ("irqchip: GICv3: ITS command queue")
> --- > drivers/irqchip/irq-gic-v3-its.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/irqchip/irq-gic-v3-its.c > b/drivers/irqchip/irq-gic-v3-its.c > index eb0882d15366..0cb584d9815b 100644 > --- a/drivers/irqchip/irq-gic-v3-its.c > +++ b/drivers/irqchip/irq-gic-v3-its.c > @@ -742,7 +742,7 @@ static struct its_collection > *its_build_invall_cmd(struct its_node *its, > > its_fixup_cmd(cmd); > > - return NULL; > + return desc->its_invall_cmd.col; > } > > static struct its_vpe *its_build_vinvall_cmd(struct its_node *its,
I'll fix the above locally, no need to resend.
Thanks,
M. -- Jazz is not dead. It just smells funny...
| |