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SubjectRe: [PATCH v2 2/2] arm64: dts: sm8350: fix tlmm base address
On Tue, Nov 30, 2021 at 09:15:29PM -0600, Bjorn Andersson wrote:
> On Mon 22 Nov 22:03 CST 2021, Vinod Koul wrote:
>
> > On 22-11-21, 11:05, Katherine Perez wrote:
> > > TLMM controller base address is incorrect and will hang on some platforms.
> > > Fix by giving the correct address.
> >
> > Thanks, recheck the spec this looks correct. We should have tlmm reg
> > space here and not tlmm base which also contains xpu region (thus hang)
> >
>
> Aren't you reading the patch backwards?
>
> Afaict downstream the driver carries an offset of 0x100000, which we
> dropped as we upstreamed the driver. As such changing reg to 0x0f000000
> should cause most gpio register accesses to fall outside the actual
> register window.
>
> Or perhaps I'm missing something here?
>
> Regards,
> Bjorn

Hi Vinod,

Gentle reminder about the response above. Without the change to the TLMM
base address, my platform hangs. I have ensured that the pinctrl driver
contains the patch that Bjorn has previously submitted here:
https://lore.kernel.org/all/20211104170835.1993686-1-bjorn.andersson@linaro.org/

Best,
Katherine

>
> > Reviewed-by: Vinod Koul <vkoul@kernel.org>
> > Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC")
> >
> > >
> > > Signed-off-by: Katherine Perez <kaperez@linux.microsoft.com>
> > > ---
> > > arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++--
> > > 1 file changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > > index d134280e2939..624d294612d8 100644
> > > --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > > @@ -960,9 +960,9 @@ spmi_bus: spmi@c440000 {
> > > #interrupt-cells = <4>;
> > > };
> > >
> > > - tlmm: pinctrl@f100000 {
> > > + tlmm: pinctrl@f000000 {
> > > compatible = "qcom,sm8350-tlmm";
> > > - reg = <0 0x0f100000 0 0x300000>;
> > > + reg = <0 0x0f000000 0 0x300000>;
> > > interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> > > gpio-controller;
> > > #gpio-cells = <2>;
> > > --
> > > 2.31.1
> >
> > --
> > ~Vinod

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