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    Subject[PATCH 5.15 081/207] KVM: arm64: Avoid setting the upper 32 bits of TCR_EL2 and CPTR_EL2 to 1
    Date
    From: Catalin Marinas <catalin.marinas@arm.com>

    commit 1f80d15020d7f130194821feb1432b67648c632d upstream.

    Having a signed (1 << 31) constant for TCR_EL2_RES1 and CPTR_EL2_TCPAC
    causes the upper 32-bit to be set to 1 when assigning them to a 64-bit
    variable. Bit 32 in TCR_EL2 is no longer RES0 in ARMv8.7: with FEAT_LPA2
    it changes the meaning of bits 49:48 and 9:8 in the stage 1 EL2 page
    table entries. As a result of the sign-extension, a non-VHE kernel can
    no longer boot on a model with ARMv8.7 enabled.

    CPTR_EL2 still has the top 32 bits RES0 but we should preempt any future
    problems

    Make these top bit constants unsigned as per commit df655b75c43f
    ("arm64: KVM: Avoid setting the upper 32 bits of VTCR_EL2 to 1").

    Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
    Reported-by: Chris January <Chris.January@arm.com>
    Cc: <stable@vger.kernel.org>
    Cc: Will Deacon <will@kernel.org>
    Cc: Marc Zyngier <maz@kernel.org>
    Signed-off-by: Marc Zyngier <maz@kernel.org>
    Link: https://lore.kernel.org/r/20211125152014.2806582-1-catalin.marinas@arm.com
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    arch/arm64/include/asm/kvm_arm.h | 4 ++--
    1 file changed, 2 insertions(+), 2 deletions(-)

    --- a/arch/arm64/include/asm/kvm_arm.h
    +++ b/arch/arm64/include/asm/kvm_arm.h
    @@ -91,7 +91,7 @@
    #define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)

    /* TCR_EL2 Registers bits */
    -#define TCR_EL2_RES1 ((1 << 31) | (1 << 23))
    +#define TCR_EL2_RES1 ((1U << 31) | (1 << 23))
    #define TCR_EL2_TBI (1 << 20)
    #define TCR_EL2_PS_SHIFT 16
    #define TCR_EL2_PS_MASK (7 << TCR_EL2_PS_SHIFT)
    @@ -276,7 +276,7 @@
    #define CPTR_EL2_TFP_SHIFT 10

    /* Hyp Coprocessor Trap Register */
    -#define CPTR_EL2_TCPAC (1 << 31)
    +#define CPTR_EL2_TCPAC (1U << 31)
    #define CPTR_EL2_TAM (1 << 30)
    #define CPTR_EL2_TTA (1 << 20)
    #define CPTR_EL2_TFP (1 << CPTR_EL2_TFP_SHIFT)

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