Messages in this thread Patch in this message | | | From | Chris Packham <> | Subject | [PATCH v3 1/2] arm/arm64: dts: Enable CP0 GPIOs for CN9130-CRB | Date | Mon, 6 Dec 2021 11:56:17 +1300 |
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Enable the CP0 GPIO devices for the CN9130-CRB. This is needed for a number of the peripheral devices to function.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> --- Changes in v3: - None
Changes in v2: - New
arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi index e7918f325646..0885c6339d1b 100644 --- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi @@ -17,6 +17,8 @@ aliases { ethernet0 = &cp0_eth0; ethernet1 = &cp0_eth1; ethernet2 = &cp0_eth2; + gpio1 = &cp0_gpio1; + gpio2 = &cp0_gpio2; }; memory@0 { @@ -114,6 +116,14 @@ cp0_spi0_pins: cp0-spi-pins-0 { }; }; +&cp0_gpio1 { + status = "okay"; +}; + +&cp0_gpio2 { + status = "okay"; +}; + &cp0_i2c0 { pinctrl-names = "default"; pinctrl-0 = <&cp0_i2c0_pins>; -- 2.34.1
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