Messages in this thread | | | Subject | Re: [PATCH v7 03/10] ASoC: qcom: Add register definition for codec rddma and wrdma | From | Srinivasa Rao Mandadapu <> | Date | Fri, 3 Dec 2021 20:59:31 +0530 |
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On 12/3/2021 6:58 PM, Srinivas Kandagatla wrote: Thanks for your time Srini!!! > > On 02/12/2021 15:43, Srinivasa Rao Mandadapu wrote: >> From: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> >> >> This patch adds register definitions for codec read dma and write dma >> lpass interface. >> >> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> >> Co-developed-by: Venkata Prasad Potturu <potturu@codeaurora.org> >> Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org> > > Overall the patch LGTM, > but for bisectablity reasons, pleas make sure these macros > > is_rxtx_cdc_dma_port() > is_cdc_dma_port() > > to be avaiable in this patch. Okay. Will change accordingly. > > Once that is fixed you could add my > > Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> > > --srini > > >> --- >> sound/soc/qcom/lpass-lpaif-reg.h | 127 >> +++++++++++++++++++++++++++++++++++++-- >> 1 file changed, 121 insertions(+), 6 deletions(-) >> >> diff --git a/sound/soc/qcom/lpass-lpaif-reg.h >> b/sound/soc/qcom/lpass-lpaif-reg.h >> index 2eb03ad..6d9d9d1 100644 >> --- a/sound/soc/qcom/lpass-lpaif-reg.h >> +++ b/sound/soc/qcom/lpass-lpaif-reg.h >> @@ -74,6 +74,21 @@ >> #define LPAIF_IRQSTAT_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x4, >> (port)) >> #define LPAIF_IRQCLEAR_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0xC, >> (port)) >> +/* LPAIF RXTX IRQ */ >> +#define LPAIF_RXTX_IRQ_REG_ADDR(v, addr, port) \ >> + (v->rxtx_irq_reg_base + (addr) + v->rxtx_irq_reg_stride * >> (port)) >> + >> +#define LPAIF_RXTX_IRQEN_REG(v, port) LPAIF_RXTX_IRQ_REG_ADDR(v, >> 0x0, port) >> +#define LPAIF_RXTX_IRQSTAT_REG(v, port) LPAIF_RXTX_IRQ_REG_ADDR(v, >> 0x4, port) >> +#define LPAIF_RXTX_IRQCLEAR_REG(v, port) LPAIF_RXTX_IRQ_REG_ADDR(v, >> 0xC, port) >> + >> +/* LPAIF VA IRQ */ >> +#define LPAIF_VA_IRQ_REG_ADDR(v, addr, port) \ >> + (v->va_irq_reg_base + (addr) + v->va_irq_reg_stride * (port)) >> + >> +#define LPAIF_VA_IRQEN_REG(v, port) LPAIF_VA_IRQ_REG_ADDR(v, 0x0, port) >> +#define LPAIF_VA_IRQSTAT_REG(v, port) LPAIF_VA_IRQ_REG_ADDR(v, 0x4, >> port) >> +#define LPAIF_VA_IRQCLEAR_REG(v, port) LPAIF_VA_IRQ_REG_ADDR(v, 0xC, >> port) >> #define LPASS_HDMITX_APP_IRQ_REG_ADDR(v, addr) \ >> ((v->hdmi_irq_reg_base) + (addr)) >> @@ -139,12 +154,112 @@ >> (LPAIF_INTFDMA_REG(v, chan, reg, dai_id)) : \ >> LPAIF_WRDMA##reg##_REG(v, chan)) >> -#define LPAIF_DMACTL_REG(v, chan, dir, dai_id) __LPAIF_DMA_REG(v, >> chan, dir, CTL, dai_id) >> -#define LPAIF_DMABASE_REG(v, chan, dir, dai_id) __LPAIF_DMA_REG(v, >> chan, dir, BASE, dai_id) >> -#define LPAIF_DMABUFF_REG(v, chan, dir, dai_id) >> __LPAIF_DMA_REG(v, chan, dir, BUFF, dai_id) >> -#define LPAIF_DMACURR_REG(v, chan, dir, dai_id) __LPAIF_DMA_REG(v, >> chan, dir, CURR, dai_id) >> -#define LPAIF_DMAPER_REG(v, chan, dir, dai_id) __LPAIF_DMA_REG(v, >> chan, dir, PER, dai_id) >> -#define LPAIF_DMAPERCNT_REG(v, chan, dir, dai_id) >> __LPAIF_DMA_REG(v, chan, dir, PERCNT, dai_id) >> +#define LPAIF_DMACTL_REG(v, chan, dir, dai_id) \ >> + (is_cdc_dma_port(dai_id) ? \ >> + __LPAIF_CDC_DMA_REG(v, chan, dir, CTL, dai_id) : \ >> + __LPAIF_DMA_REG(v, chan, dir, CTL, dai_id)) >> +#define LPAIF_DMABASE_REG(v, chan, dir, dai_id) \ >> + (is_cdc_dma_port(dai_id) ? \ >> + __LPAIF_CDC_DMA_REG(v, chan, dir, BASE, dai_id) : \ >> + __LPAIF_DMA_REG(v, chan, dir, BASE, dai_id)) >> +#define LPAIF_DMABUFF_REG(v, chan, dir, dai_id) \ >> + (is_cdc_dma_port(dai_id) ? \ >> + __LPAIF_CDC_DMA_REG(v, chan, dir, BUFF, dai_id) : \ >> + __LPAIF_DMA_REG(v, chan, dir, BUFF, dai_id)) >> +#define LPAIF_DMACURR_REG(v, chan, dir, dai_id) \ >> + (is_cdc_dma_port(dai_id) ? \ >> + __LPAIF_CDC_DMA_REG(v, chan, dir, CURR, dai_id) : \ >> + __LPAIF_DMA_REG(v, chan, dir, CURR, dai_id)) >> +#define LPAIF_DMAPER_REG(v, chan, dir, dai_id) \ >> + (is_cdc_dma_port(dai_id) ? \ >> + __LPAIF_CDC_DMA_REG(v, chan, dir, PER, dai_id) : \ >> + __LPAIF_DMA_REG(v, chan, dir, PER, dai_id)) >> +#define LPAIF_DMAPERCNT_REG(v, chan, dir, dai_id) \ >> + (is_cdc_dma_port(dai_id) ? \ >> + __LPAIF_CDC_DMA_REG(v, chan, dir, PERCNT, dai_id) : \ >> + __LPAIF_DMA_REG(v, chan, dir, PERCNT, dai_id)) >> + >> +#define LPAIF_CDC_RDMA_REG_ADDR(v, addr, chan, dai_id) \ >> + (is_rxtx_cdc_dma_port(dai_id) ? \ >> + (v->rxtx_rdma_reg_base + (addr) + v->rxtx_rdma_reg_stride * >> (chan)) : \ >> + (v->va_rdma_reg_base + (addr) + v->va_rdma_reg_stride * (chan))) >> + >> +#define LPAIF_CDC_RXTX_RDMACTL_REG(v, chan, dai_id) \ >> + LPAIF_CDC_RDMA_REG_ADDR(v, 0x00, (chan), dai_id) >> +#define LPAIF_CDC_RXTX_RDMABASE_REG(v, chan, dai_id) \ >> + LPAIF_CDC_RDMA_REG_ADDR(v, 0x04, (chan), dai_id) >> +#define LPAIF_CDC_RXTX_RDMABUFF_REG(v, chan, dai_id) \ >> + LPAIF_CDC_RDMA_REG_ADDR(v, 0x08, (chan), dai_id) >> +#define LPAIF_CDC_RXTX_RDMACURR_REG(v, chan, dai_id) \ >> + LPAIF_CDC_RDMA_REG_ADDR(v, 0x0C, (chan), dai_id) >> +#define LPAIF_CDC_RXTX_RDMAPER_REG(v, chan, dai_id) \ >> + LPAIF_CDC_RDMA_REG_ADDR(v, 0x10, (chan), dai_id) >> +#define LPAIF_CDC_RXTX_RDMA_INTF_REG(v, chan, dai_id) \ >> + LPAIF_CDC_RDMA_REG_ADDR(v, 0x50, (chan), dai_id) >> + >> +#define LPAIF_CDC_VA_RDMACTL_REG(v, chan, dai_id) >> LPAIF_CDC_RDMA_REG_ADDR(v, 0x00, (chan), dai_id) >> +#define LPAIF_CDC_VA_RDMABASE_REG(v, chan, dai_id) >> LPAIF_CDC_RDMA_REG_ADDR(v, 0x04, (chan), dai_id) >> +#define LPAIF_CDC_VA_RDMABUFF_REG(v, chan, dai_id) >> LPAIF_CDC_RDMA_REG_ADDR(v, 0x08, (chan), dai_id) >> +#define LPAIF_CDC_VA_RDMACURR_REG(v, chan, dai_id) >> LPAIF_CDC_RDMA_REG_ADDR(v, 0x0C, (chan), dai_id) >> +#define LPAIF_CDC_VA_RDMAPER_REG(v, chan, dai_id) >> LPAIF_CDC_RDMA_REG_ADDR(v, 0x10, (chan), dai_id) >> +#define LPAIF_CDC_VA_RDMA_INTF_REG(v, chan, dai_id) \ >> + LPAIF_CDC_RDMA_REG_ADDR(v, 0x50, (chan), dai_id) >> + >> +#define LPAIF_CDC_WRDMA_REG_ADDR(v, addr, chan, dai_id) \ >> + (is_rxtx_cdc_dma_port(dai_id) ? \ >> + (v->rxtx_wrdma_reg_base + (addr) + \ >> + v->rxtx_wrdma_reg_stride * (chan - >> v->rxtx_wrdma_channel_start)) : \ >> + (v->va_wrdma_reg_base + (addr) + \ >> + v->va_wrdma_reg_stride * (chan - v->va_wrdma_channel_start))) >> + >> +#define LPAIF_CDC_RXTX_WRDMACTL_REG(v, chan, dai_id) \ >> + LPAIF_CDC_WRDMA_REG_ADDR(v, 0x00, (chan), dai_id) >> +#define LPAIF_CDC_RXTX_WRDMABASE_REG(v, chan, dai_id) \ >> + LPAIF_CDC_WRDMA_REG_ADDR(v, 0x04, (chan), dai_id) >> +#define LPAIF_CDC_RXTX_WRDMABUFF_REG(v, chan, dai_id) \ >> + LPAIF_CDC_WRDMA_REG_ADDR(v, 0x08, (chan), dai_id) >> +#define LPAIF_CDC_RXTX_WRDMACURR_REG(v, chan, dai_id) \ >> + LPAIF_CDC_WRDMA_REG_ADDR(v, 0x0C, (chan), dai_id) >> +#define LPAIF_CDC_RXTX_WRDMAPER_REG(v, chan, dai_id) \ >> + LPAIF_CDC_WRDMA_REG_ADDR(v, 0x10, (chan), dai_id) >> +#define LPAIF_CDC_RXTX_WRDMA_INTF_REG(v, chan, dai_id) \ >> + LPAIF_CDC_WRDMA_REG_ADDR(v, 0x50, (chan), dai_id) >> + >> +#define LPAIF_CDC_VA_WRDMACTL_REG(v, chan, dai_id) \ >> + LPAIF_CDC_WRDMA_REG_ADDR(v, 0x00, (chan), dai_id) >> +#define LPAIF_CDC_VA_WRDMABASE_REG(v, chan, dai_id) \ >> + LPAIF_CDC_WRDMA_REG_ADDR(v, 0x04, (chan), dai_id) >> +#define LPAIF_CDC_VA_WRDMABUFF_REG(v, chan, dai_id) \ >> + LPAIF_CDC_WRDMA_REG_ADDR(v, 0x08, (chan), dai_id) >> +#define LPAIF_CDC_VA_WRDMACURR_REG(v, chan, dai_id) \ >> + LPAIF_CDC_WRDMA_REG_ADDR(v, 0x0C, (chan), dai_id) >> +#define LPAIF_CDC_VA_WRDMAPER_REG(v, chan, dai_id) \ >> + LPAIF_CDC_WRDMA_REG_ADDR(v, 0x10, (chan), dai_id) >> +#define LPAIF_CDC_VA_WRDMA_INTF_REG(v, chan, dai_id) \ >> + LPAIF_CDC_WRDMA_REG_ADDR(v, 0x50, (chan), dai_id) >> + >> +#define __LPAIF_CDC_RDDMA_REG(v, chan, dir, reg, dai_id) \ >> + (is_rxtx_cdc_dma_port(dai_id) ? >> LPAIF_CDC_RXTX_RDMA##reg##_REG(v, chan, dai_id) : \ >> + LPAIF_CDC_VA_RDMA##reg##_REG(v, chan, dai_id)) >> + >> +#define __LPAIF_CDC_WRDMA_REG(v, chan, dir, reg, dai_id) \ >> + (is_rxtx_cdc_dma_port(dai_id) ? >> LPAIF_CDC_RXTX_WRDMA##reg##_REG(v, chan, dai_id) : \ >> + LPAIF_CDC_VA_WRDMA##reg##_REG(v, chan, dai_id)) >> + >> +#define __LPAIF_CDC_DMA_REG(v, chan, dir, reg, dai_id) \ >> + ((dir == SNDRV_PCM_STREAM_PLAYBACK) ? \ >> + __LPAIF_CDC_RDDMA_REG(v, chan, dir, reg, dai_id) : \ >> + __LPAIF_CDC_WRDMA_REG(v, chan, dir, reg, dai_id)) >> + >> +#define LPAIF_CDC_INTF_REG(v, chan, dir, dai_id) \ >> + ((dir == SNDRV_PCM_STREAM_PLAYBACK) ? \ >> + LPAIF_CDC_RDMA_INTF_REG(v, chan, dai_id) : \ >> + LPAIF_CDC_WRDMA_INTF_REG(v, chan, dai_id)) >> + >> +#define LPAIF_INTF_REG(v, chan, dir, dai_id) \ >> + (is_cdc_dma_port(dai_id) ? \ >> + LPAIF_CDC_INTF_REG(v, chan, dir, dai_id) : \ >> + LPAIF_DMACTL_REG(v, chan, dir, dai_id)) >> #define LPAIF_DMACTL_BURSTEN_SINGLE 0 >> #define LPAIF_DMACTL_BURSTEN_INCR4 1 >> -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
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