lkml.org 
[lkml]   [2021]   [Dec]   [22]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [Patch v3 3/9] dt-bindings: arm: tegra: Add NVIDIA Tegra194 axi2apb binding
On Tue, Dec 21, 2021 at 06:21:11PM +0530, Sumit Gupta wrote:
> Add device-tree binding documentation to represent the axi2apb bridges
> used by Control Backbone (CBB) 1.0 in Tegra194 SOC. All errors for APB
> slaves are reported as slave error because APB bas single bit to report
> error. So, CBB driver needs to further check error status registers of
> all the axi2apb bridges to find error type.
>
> Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> .../arm/tegra/nvidia,tegra194-axi2apb.yaml | 40 +++++++++++++++++++
> 1 file changed, 40 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml
> new file mode 100644
> index 000000000000..788a13f8aa93
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml
> @@ -0,0 +1,40 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-axi2apb.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: NVIDIA Tegra194 AXI2APB bridge
> +
> +maintainers:
> + - Sumit Gupta <sumitg@nvidia.com>
> +
> +properties:
> + $nodename:
> + pattern: "^axi2apb@([0-9a-f]+)$"
> +
> + compatible:
> + enum:
> + - nvidia,tegra194-axi2apb
> +
> + reg:
> + maxItems: 6
> + description: Physical base address and length of registers for all bridges
> +
> +additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> +
> +examples:
> + - |
> + axi2apb: axi2apb@2390000 {

As axi2apb appears to be a bus, then all the child nodes (APB devices)
should be under this node.

Is NVidia still putting all the devices at the root level rather than
under a bus node which is preferred?

> + compatible = "nvidia,tegra194-axi2apb";
> + reg = <0x02390000 0x1000>,
> + <0x023a0000 0x1000>,
> + <0x023b0000 0x1000>,
> + <0x023c0000 0x1000>,
> + <0x023d0000 0x1000>,
> + <0x023e0000 0x1000>;
> + };
> --
> 2.17.1
>
>

\
 
 \ /
  Last update: 2021-12-22 19:35    [W:0.113 / U:0.420 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site