Messages in this thread | | | Date | Tue, 21 Dec 2021 10:53:36 +0100 | From | Andrew Lunn <> | Subject | Re: [RFC PATCH v12 01/17] dlb: add skeleton for DLB driver |
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> +The following diagram shows a typical packet processing pipeline with the Intel DLB. > + > + WC1 WC4 > + +-----+ +----+ +---+ / \ +---+ / \ +---+ +----+ +-----+ > + |NIC | |Rx | |DLB| / \ |DLB| / \ |DLB| |Tx | |NIC | > + |Ports|---|Core|---| |-----WC2----| |-----WC5----| |---|Core|---|Ports| > + +-----+ -----+ +---+ \ / +---+ \ / +---+ +----+ ------+ > + \ / \ / > + WC3 WC6
This is the only mention of NIC here. Does the application interface to the network stack in the usual way to receive packets from the TCP/IP stack up into user space and then copy it back down into the MMIO block for it to enter the DLB for the first time? And at the end of the path, does the application copy it from the MMIO into a standard socket for TCP/IP processing to be send out the NIC?
Do you even needs NICs here? Could the data be coming of a video camera and you are distributing image processing over a number of cores?
Andrew
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