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    Subject[PATCH 5.15 088/177] drm/amd/display: Set exit_optimized_pwr_state for DCN31
    Date
    From: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>

    [ Upstream commit 7e4d2f30df3fb48f75ce9e96867d42bdddab83ac ]

    [Why]
    SMU now respects the PHY refclk disable request from driver.

    This causes a hang during hotplug when PHY refclk was disabled
    because it's not being re-enabled and the transmitter control
    starts on dc_link_detect.

    [How]
    We normally would re-enable the clk with exit_optimized_pwr_state
    but this is only set on DCN21 and DCN301. Set it for dcn31 as well.

    This fixes DMCUB timeouts in the PHY.

    Fixes: 64b1d0e8d500 ("drm/amd/display: Add DCN3.1 HWSEQ")

    Reviewed-by: Eric Yang <Eric.Yang2@amd.com>
    Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
    Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
    Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 1 +
    1 file changed, 1 insertion(+)

    diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
    index 40011cd3c8ef0..ac8fb202fd5ee 100644
    --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
    +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
    @@ -100,6 +100,7 @@ static const struct hw_sequencer_funcs dcn31_funcs = {
    .z10_save_init = dcn31_z10_save_init,
    .is_abm_supported = dcn31_is_abm_supported,
    .set_disp_pattern_generator = dcn30_set_disp_pattern_generator,
    + .exit_optimized_pwr_state = dcn21_exit_optimized_pwr_state,
    .update_visual_confirm_color = dcn20_update_visual_confirm_color,
    };

    --
    2.33.0


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