Messages in this thread | | | From | <> | Subject | Re: [PATCH v5 2/2] mtd: spi-nor: macronix: Add support for mx66lm1g45g | Date | Mon, 20 Dec 2021 11:10:12 +0000 |
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On 12/20/21 12:25 PM, Pratyush Yadav wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Hi Tudor, > > On 17/12/21 08:06PM, Tudor Ambarus wrote: >> mx66lm1g45g supports just 1-1-1, 8-8-8 and 8D-8D-8D modes. There are >> versions of mx66lm1g45g which do not support SFDP, thus use >> SPI_NOR_SKIP_SFDP. The RDID command issued through the octal peripheral >> interface outputs data always in STR mode for whatever reason. Since >> 8D-8D-8S is not common, avoid reading the ID when enabling the octal dtr >> mode. Instead, read back the CR2 to check if the switch was successful. > > I replied to your v2 just now about this. > >> Tested in 1-1-1 and 8d-8d-8d modes using sama7g5 QSPI IP. > > Link to datasheet in the commit message would be nice.
Do you know if there's a standardized way to add a link to a datasheet in the commit message, i.e. should I use the Link tag or just a simple link will do? > > As discussed on IRC, this flash reverses byte order in 8D-8D-8D mode. So > the data you write in 1S-1S-1S mode will be have byte order reversed > when reading in 8D-8D-8D mode. Do you have any plans on doing something > for this? Or do we just leave it to the user to figure it out?
I don't think we should amend this in software. Reading/writing in 8D-8D-8D will give sane results, the problem is just when you use STR for write and DTR for read, or viceversa. This is just a bad design and we should leave it as it is.
I'll address all your other comments in a v6. Thanks. ta
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