Messages in this thread | | | Date | Mon, 20 Dec 2021 11:34:47 -0500 | Subject | Re: [PATCH] perf pmu: Fix event list for uncore PMUs | From | "Liang, Kan" <> |
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On 12/20/2021 3:38 AM, John Garry wrote: > On 18/12/2021 01:47, Arnaldo Carvalho de Melo wrote: >>> Commit 0e0ae8742207 ("perf list: Display hybrid PMU events with cpu >>> type") >>> changed the list for uncore PMUs, such that duplicate aliases are now >>> listed per PMU (which they should not be), like: >>> >>> ./perf list >>> ... >>> unc_cbo_cache_lookup.any_es >>> [Unit: uncore_cbox L3 Lookup any request that access cache and found >>> line in E or S-state] >>> unc_cbo_cache_lookup.any_es >>> [Unit: uncore_cbox L3 Lookup any request that access cache and found >>> line in E or S-state] >>> unc_cbo_cache_lookup.any_i >>> [Unit: uncore_cbox L3 Lookup any request that access cache and found >>> line in I-state] >>> unc_cbo_cache_lookup.any_i >>> [Unit: uncore_cbox L3 Lookup any request that access cache and found >>> line in I-state] >>> ... >>> >>> Notice how the events are listed twice. >> Hi Jin, >> >> Can I have your acked-by/tested-by? > > Hi Arnaldo, > > I assume that address is bouncing for you also. >
Yes, Jin Yao has left Intel.
> So if anyone else has one of these hybrid PMU x86 systems then it would > be appreciated to check this change. >
+ Zhengjun
Zhengjun,
Could you please help to verify the change?
Thanks, Kan
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