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SubjectRe: [PATCH V7 08/18] x86/entry: Preserve PKRS MSR across exceptions
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On 11/12/21 16:50, Ira Weiny wrote:
> On Tue, Aug 03, 2021 at 09:32:21PM -0700, 'Ira Weiny' wrote:
>> From: Ira Weiny <ira.weiny@intel.com>
>>
>> The PKRS MSR is not managed by XSAVE. It is preserved through a context
>> switch but this support leaves exception handling code open to memory
>> accesses during exceptions.
>>
>> 2 possible places for preserving this state were considered,
>> irqentry_state_t or pt_regs.[1] pt_regs was much more complicated and
>> was potentially fraught with unintended consequences.[2] However, Andy
>> came up with a way to hide additional values on the stack which could be
>> accessed as "extended_pt_regs".[3]
>
> Andy,
>
> I'm preparing to send V8 of this PKS work. But I have not seen any feed back
> since I originally implemented this in V4[1].
>
> Does this meets your expectations? Are there any issues you can see with this
> code?

I think I'm generally okay with the approach to allocating space. All
of Thomas' comments still apply, though. (Sorry, I'm horribly behind.)

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