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SubjectRe: [PATCH v2 12/17] dt-bindings: pwm: add microchip corePWM binding
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On 17/12/2021 10:33, conor.dooley@microchip.com wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Add device tree bindings for the Microchip fpga fabric based "core" PWM controller.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../bindings/pwm/microchip,corepwm.yaml | 61 +++++++++++++++++++
> 1 file changed, 61 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml
>
> diff --git a/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml b/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml
> new file mode 100644
> index 000000000000..ed7d0351adc9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml
> @@ -0,0 +1,61 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pwm/microchip,corepwm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip ip core PWM controller bindings
> +
> +maintainers:
> + - Conor Dooley <conor.dooley@microchip.com>
> +
> +description: |
> + corePWM is an 16 channel pulse width modulator FPGA IP
> +
> + https://www.microsemi.com/existing-parts/parts/152118
> +
> +properties:
> + compatible:
> + items:
> + - const: microchip,corepwm
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + "#pwm-cells":
> + const: 2
> +
> + microchip,sync-update:
> + description: |
> + In synchronous mode, all channels are updated at the beginning of the PWM period.
> + Asynchronous mode is relevant to applications such as LED control, where
> + synchronous updates are not required. Asynchronous mode lowers the area size,
> + reducing shadow register requirements. This can be set at run time, provided
> + SHADOW_REG_EN is asserted. SHADOW_REG_EN is set by the FPGA bitstream programmed
> + to the device.

Please also describe what is the meaning of the values used here. What
does a value "2" mean?

> +
> + $ref: /schemas/types.yaml#/definitions/uint8
> + default: 0
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - "#pwm-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include "dt-bindings/clock/microchip,mpfs-clock.h"
> + corePWN1: corePWM@41000000 {

Here and in all patches, please skip the label. It's not helping.

Node name: pwm

> + compatible = "microchip,corepwm";
> + microchip,sync-update = /bits/ 8 <1>;
> + clocks = <&clkcfg CLK_FIC3>;
> + reg = <0x41000000 0xF0>;
> + #pwm-cells = <2>;
> + };
>


Best regards,
Krzysztof

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