Messages in this thread | | | Date | Thu, 16 Dec 2021 15:06:18 +0000 | From | Marc Zyngier <> | Subject | Re: [PATCH V8 02/10] irqchip/loongson-pch-pic: Add ACPI init support |
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On Thu, 16 Dec 2021 12:53:48 +0000, Huacai Chen <chenhuacai@loongson.cn> wrote: > > We are preparing to add new Loongson (based on LoongArch, not compatible > with old MIPS-based Loongson) support. LoongArch use ACPI other than DT > as its boot protocol, so add ACPI init support. > > PCH-PIC/PCH-MSI stands for "Interrupt Controller" that described in > Section 5 of "Loongson 7A1000 Bridge User Manual". For more information > please refer Documentation/loongarch/irq-chip-model.rst. > > Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> > --- > drivers/irqchip/irq-loongson-pch-pic.c | 108 ++++++++++++++++++------- > 1 file changed, 81 insertions(+), 27 deletions(-)
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> > +#ifdef CONFIG_ACPI > + > +struct irq_domain *pch_pic_acpi_init(struct irq_domain *parent, > + struct acpi_madt_bio_pic *acpi_pchpic)
Who is calling this? This works the opposite way from what the arm64 irqchips are doing. Why? I have the ugly feeling that this is called from the arch code, bypassing the existing infrastructure...
M.
-- Without deviation from the norm, progress is not possible.
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