lkml.org 
[lkml]   [2021]   [Dec]   [15]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
Date
From
SubjectRe: [PATCH] hwmon : (mr75203) fix macro typo
On Wed, Dec 15, 2021 at 12:36:32PM +0000, Arseny Demidov wrote:
> Yes, I have access to the datasheet and caught an error on simulation IP-block.

> The datasheet says that register "Expressed in units of IP clk cycles."
> Typical power-up delays for Temperature Sensor are 256 cycles i. e. 0x100

Please add that information to the commit description. Also,
please copy Rahul Tanwar <rahul.tanwar@linux.intel.com> and
Andy Shevchenko <andriy.shevchenko@intel.com> on your patch.

Thanks,
Guenter

>
> -----Original Message-----
> From: Guenter Roeck <groeck7@gmail.com> On Behalf Of Guenter Roeck
> Sent: Wednesday, December 15, 2021 3:31 PM
> To: Arseny Demidov <arsdemal@gmail.com>
> Cc: Arseny Demidov <a.demidov@yadro.com>; Jean Delvare <jdelvare@suse.com>; linux-hwmon@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH] hwmon : (mr75203) fix macro typo
>
> On 12/15/21 3:59 AM, Guenter Roeck wrote:
> > On 12/15/21 3:30 AM, Arseny Demidov wrote:
> >> In the file mr75203.c we have a macro named POWER_DELAY_CYCLE_256,
> >> the correct value should be 0x100
> >>
> >
> > How do you know that ? Do you have access to the datasheet, or is it
> > just an assumption based on the name of the define ?
> >
>
> Also, how do you know that the value is wrong, not the name of the define ?
>
> Guenter
>
> > Guenter
> >
> >> Signed-off-by: Arseny Demidov <a.demidov@yadro.com>
> >> ---
> >>   drivers/hwmon/mr75203.c | 2 +-
> >>   1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/hwmon/mr75203.c b/drivers/hwmon/mr75203.c index
> >> 868243dba1ee..1ba1e3145969 100644
> >> --- a/drivers/hwmon/mr75203.c
> >> +++ b/drivers/hwmon/mr75203.c
> >> @@ -93,7 +93,7 @@
> >>   #define VM_CH_REQ    BIT(21)
> >>   #define IP_TMR            0x05
> >> -#define POWER_DELAY_CYCLE_256    0x80
> >> +#define POWER_DELAY_CYCLE_256    0x100
> >>   #define POWER_DELAY_CYCLE_64    0x40
> >>   #define PVT_POLL_DELAY_US    20
> >>
> >
>

\
 
 \ /
  Last update: 2021-12-15 17:29    [W:0.048 / U:0.324 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site