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    Subject[PATCH v3 03/10] dt-bindings: apple,aic: Add affinity description for per-cpu pseudo-interrupts
    Date
    Some of the FIQ per-cpu pseudo-interrupts are better described with
    a specific affinity, the most obvious candidate being the CPU PMUs.

    Augment the AIC binding to be able to specify that affinity in the
    interrupt controller node.

    Signed-off-by: Marc Zyngier <maz@kernel.org>
    ---
    .../interrupt-controller/apple,aic.yaml | 26 +++++++++++++++++++
    1 file changed, 26 insertions(+)

    diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
    index b95e41816953..ac1c82cffa0a 100644
    --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
    +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
    @@ -67,6 +67,32 @@ properties:
    Specifies base physical address and size of the AIC registers.
    maxItems: 1

    + affinities:
    + type: object
    + description:
    + FIQ affinity can be expressed as a single "affinities" node,
    + containing a set of sub-nodes, one per FIQ with a non-default
    + affinity.
    + patternProperties:
    + "^.+-affinity$":
    + type: object
    + properties:
    + fiq-index:
    + description:
    + The interrupt number specified as a FIQ, and for which
    + the affinity is not the default.
    + $ref: /schemas/types.yaml#/definitions/uint32
    + maximum: 5
    + affinity:
    + $ref: /schemas/types.yaml#/definitions/phandle-array
    + description:
    + Should be a list of phandles to CPU nodes (as described in
    + Documentation/devicetree/bindings/arm/cpus.yaml).
    +
    + required:
    + - fiq-index
    + - affinity
    +
    required:
    - compatible
    - '#interrupt-cells'
    --
    2.30.2
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