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SubjectRE: [EXT] Re: [PATCH v6 4/4] perf/marvell: cn10k DDR perf event core ownership
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> -----Original Message-----
> From: Will Deacon <will@kernel.org>
> Sent: Tuesday, December 14, 2021 5:55 PM
> To: Bharat Bhushan <bbhushan2@marvell.com>
> Cc: mark.rutland@arm.com; robh+dt@kernel.org; Bhaskara Budiredla
> <bbudiredla@marvell.com>; Sunil Kovvuri Goutham <sgoutham@marvell.com>;
> linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Subject: [EXT] Re: [PATCH v6 4/4] perf/marvell: cn10k DDR perf event core
> ownership
>
> External Email
>
> ----------------------------------------------------------------------
> On Fri, Oct 29, 2021 at 05:26:43PM +0530, Bharat Bhushan wrote:
> > As DDR perf event counters are not per core, so they should be
> > accessed only by one core at a time. Select new core when previously
> > owning core is going offline.
> >
> > Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com>
> > ---
> > v1->v6
> > - No Change
> >
> > drivers/perf/marvell_cn10k_ddr_pmu.c | 50 ++++++++++++++++++++++++++--
> > include/linux/cpuhotplug.h | 1 +
> > 2 files changed, 49 insertions(+), 2 deletions(-)
>
> I don't think the driver is much use without this patch, so please can you move
> the Kconfig stuff to a patch at the end so that the driver can't be enabled in a
> broken state half way through the series?

Okay, will change.

Thanks
-Bharat

>
> Will

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