Messages in this thread | | | Subject | Re: [PATCH v5 05/24] ARM: tegra: Add device-tree for ASUS Transformer EeePad TF101 | From | Dmitry Osipenko <> | Date | Sat, 11 Dec 2021 18:28:50 +0300 |
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10.12.2021 18:46, Thierry Reding пишет: > Again, the memory-controller node needs to be sorted differently. There > are other occurrences of this throughout the file.
Memory-controller node is placed on purpose in the end of DT to keep it readable. Those huge timings make it unreadable. I don't want to change it. Alternatively, we can factor out timings into separate DTSI, but it's unnecessary to me. I leave it up to you to decide what to do.
I'll reorder couple nodes alphabetically, those that don't have address and were missed by me. The by-address nodes are all okay to me.
Please feel free to reorder nodes to yours liking by yourself while applying if I'll miss something.
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