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    SubjectRe: [PATCH v8 01/40] x86/compressed/64: detect/setup SEV/SME features earlier in boot
    On Fri, Dec 10, 2021 at 09:42:53AM -0600, Brijesh Singh wrote:
    > @@ -447,6 +446,23 @@ SYM_CODE_START(startup_64)
    > call load_stage1_idt
    > popq %rsi
    >
    > +#ifdef CONFIG_AMD_MEM_ENCRYPT

    I guess that ifdeffery is not needed.

    > + /*
    > + * Now that the stage1 interrupt handlers are set up, #VC exceptions from
    > + * CPUID instructions can be properly handled for SEV-ES guests.
    > + *
    > + * For SEV-SNP, the CPUID table also needs to be set up in advance of any
    > + * CPUID instructions being issued, so go ahead and do that now via
    > + * sev_enable(), which will also handle the rest of the SEV-related
    > + * detection/setup to ensure that has been done in advance of any dependent
    > + * code.
    > + */
    > + pushq %rsi
    > + movq %rsi, %rdi /* real mode address */
    > + call sev_enable
    > + popq %rsi
    > +#endif
    > +
    > /*
    > * paging_prepare() sets up the trampoline and checks if we need to
    > * enable 5-level paging.

    ...

    > +void sev_enable(struct boot_params *bp)
    > +{
    > + unsigned int eax, ebx, ecx, edx;
    > +
    > + /* Check for the SME/SEV support leaf */
    > + eax = 0x80000000;
    > + ecx = 0;
    > + native_cpuid(&eax, &ebx, &ecx, &edx);
    > + if (eax < 0x8000001f)
    > + return;
    > +
    > + /*
    > + * Check for the SME/SEV feature:
    > + * CPUID Fn8000_001F[EAX]
    > + * - Bit 0 - Secure Memory Encryption support
    > + * - Bit 1 - Secure Encrypted Virtualization support
    > + * CPUID Fn8000_001F[EBX]
    > + * - Bits 5:0 - Pagetable bit position used to indicate encryption
    > + */
    > + eax = 0x8000001f;
    > + ecx = 0;
    > + native_cpuid(&eax, &ebx, &ecx, &edx);
    > + /* Check whether SEV is supported */
    > + if (!(eax & BIT(1)))
    > + return;
    > +
    > + /* Set the SME mask if this is an SEV guest. */
    > + sev_status = rd_sev_status_msr();
    > +

    ^ Superfluous newline.

    > + if (!(sev_status & MSR_AMD64_SEV_ENABLED))
    > + return;
    > +
    > + sme_me_mask = BIT_ULL(ebx & 0x3f);
    > +}
    > --

    Thx.

    --
    Regards/Gruss,
    Boris.

    https://people.kernel.org/tglx/notes-about-netiquette

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