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SubjectRe: [PATCH v3 2/2] x86/tsc: skip tsc watchdog checking for qualified platforms
On Tue, Nov 16, 2021 at 11:18 PM Feng Tang <feng.tang@intel.com> wrote:
>
> There are cases that tsc clocksources are wrongly judged as unstable by
> clocksource watchdogs like hpet, acpi_pm or 'refined-jiffies'. While
> there is hardly a general reliable way to check the validity of a
> watchdog, and to protect the innocent tsc, Thomas Gleixner proposed [1]:
>
> "I'm inclined to lift that requirement when the CPU has:
>
> 1) X86_FEATURE_CONSTANT_TSC
> 2) X86_FEATURE_NONSTOP_TSC
> 3) X86_FEATURE_NONSTOP_TSC_S3
> 4) X86_FEATURE_TSC_ADJUST
> 5) At max. 4 sockets
>
> After two decades of horrors we're finally at a point where TSC seems
> to be halfway reliable and less abused by BIOS tinkerers. TSC_ADJUST
> was really key as we can now detect even small modifications reliably
> and the important point is that we can cure them as well (not pretty
> but better than all other options)."
>
> As feature #3 X86_FEATURE_NONSTOP_TSC_S3 only exists on several generations
> of Atom processor, and is always coupled with X86_FEATURE_CONSTANT_TSC
> and X86_FEATURE_NONSTOP_TSC, skip checking it, and also be more defensive
> to use maxim of 2 sockets.
>
> The check is done inside tsc_init() before registering 'tsc-early' and
> 'tsc' clocksources, as there were cases that both of them had been
> wrongly judged as unreliable.
>
> For more background of tsc/watchdog, there is a good summary in [2]
>
> [1]. https://lore.kernel.org/lkml/87eekfk8bd.fsf@nanos.tec.linutronix.de/
> [2]. https://lore.kernel.org/lkml/87a6pimt1f.ffs@nanos.tec.linutronix.de/
> Suggested-by: Thomas Gleixner <tglx@linutronix.de>
> Signed-off-by: Feng Tang <feng.tang@intel.com>
> ---
> Change log:
>
> v3:
> * rebased against 5.16-rc1
> * refine commit log
>
> v2:
> * Directly skip watchdog check without messing flag
> 'tsc_clocksource_reliable' (Thomas)
>
> arch/x86/kernel/tsc.c | 22 ++++++++++++++++++----
> 1 file changed, 18 insertions(+), 4 deletions(-)

retry:

Reviewed-by: Luming Yu <luming.yu@intel.com>

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