lkml.org 
[lkml]   [2021]   [Nov]   [9]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH AUTOSEL 5.15 73/82] arm64: dts: qcom: msm8916: Add CPU ACC and SAW/SPM
Date
From: Stephan Gerhold <stephan@gerhold.net>

[ Upstream commit a22f9a766e1dc61f8f6ee2edfe83d4d23d78e059 ]

Add the device tree nodes necessary for SMP bring-up and cpuidle
without PSCI on ARM32. The hardware is typically controlled by the
PSCI implementation in the TrustZone firmware and is therefore marked
as status = "reserved" by default (from the device tree specification):

"Indicates that the device is operational, but should not be used.
Typically this is used for devices that are controlled by another
software component, such as platform firmware."

Since this is part of the MSM8916 SoC it should be added to msm8916.dtsi
but in practice these nodes should only get enabled via an extra include
on ARM32.

This is necessary for some devices with signed firmware which is missing
both ARM64 and PSCI support and can therefore only boot ARM32 kernels.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004204955.21077-13-stephan@gerhold.net
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 56 +++++++++++++++++++++++++++
1 file changed, 56 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 7c656bde927f7..c9467665250e7 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -124,6 +124,8 @@
#cooling-cells = <2>;
power-domains = <&CPU_PD0>;
power-domain-names = "psci";
+ qcom,acc = <&cpu0_acc>;
+ qcom,saw = <&cpu0_saw>;
};

CPU1: cpu@1 {
@@ -137,6 +139,8 @@
#cooling-cells = <2>;
power-domains = <&CPU_PD1>;
power-domain-names = "psci";
+ qcom,acc = <&cpu1_acc>;
+ qcom,saw = <&cpu1_saw>;
};

CPU2: cpu@2 {
@@ -150,6 +154,8 @@
#cooling-cells = <2>;
power-domains = <&CPU_PD2>;
power-domain-names = "psci";
+ qcom,acc = <&cpu2_acc>;
+ qcom,saw = <&cpu2_saw>;
};

CPU3: cpu@3 {
@@ -163,6 +169,8 @@
#cooling-cells = <2>;
power-domains = <&CPU_PD3>;
power-domain-names = "psci";
+ qcom,acc = <&cpu3_acc>;
+ qcom,saw = <&cpu3_saw>;
};

L2_0: l2-cache {
@@ -1871,6 +1879,54 @@
status = "disabled";
};
};
+
+ cpu0_acc: power-manager@b088000 {
+ compatible = "qcom,msm8916-acc";
+ reg = <0x0b088000 0x1000>;
+ status = "reserved"; /* Controlled by PSCI firmware */
+ };
+
+ cpu0_saw: power-manager@b089000 {
+ compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
+ reg = <0x0b089000 0x1000>;
+ status = "reserved"; /* Controlled by PSCI firmware */
+ };
+
+ cpu1_acc: power-manager@b098000 {
+ compatible = "qcom,msm8916-acc";
+ reg = <0x0b098000 0x1000>;
+ status = "reserved"; /* Controlled by PSCI firmware */
+ };
+
+ cpu1_saw: power-manager@b099000 {
+ compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
+ reg = <0x0b099000 0x1000>;
+ status = "reserved"; /* Controlled by PSCI firmware */
+ };
+
+ cpu2_acc: power-manager@b0a8000 {
+ compatible = "qcom,msm8916-acc";
+ reg = <0x0b0a8000 0x1000>;
+ status = "reserved"; /* Controlled by PSCI firmware */
+ };
+
+ cpu2_saw: power-manager@b0a9000 {
+ compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
+ reg = <0x0b0a9000 0x1000>;
+ status = "reserved"; /* Controlled by PSCI firmware */
+ };
+
+ cpu3_acc: power-manager@b0b8000 {
+ compatible = "qcom,msm8916-acc";
+ reg = <0x0b0b8000 0x1000>;
+ status = "reserved"; /* Controlled by PSCI firmware */
+ };
+
+ cpu3_saw: power-manager@b0b9000 {
+ compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
+ reg = <0x0b0b9000 0x1000>;
+ status = "reserved"; /* Controlled by PSCI firmware */
+ };
};

thermal-zones {
--
2.33.0
\
 
 \ /
  Last update: 2021-11-09 23:23    [W:0.715 / U:0.108 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site