Messages in this thread | | | Date | Mon, 8 Nov 2021 09:57:19 -0800 | From | Bjorn Andersson <> | Subject | Re: [PATCH] iommu/arm-smmu-qcom: Fix TTBR0 read |
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On Mon 08 Nov 09:17 PST 2021, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org> > > It is a 64b register, lets not lose the upper bits. > > Fixes: ab5df7b953d8 ("iommu/arm-smmu-qcom: Add an adreno-smmu-priv callback to get pagefault info") > Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Regards, Bjorn
> --- > drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c > index 55690af1b25d..c998960495b4 100644 > --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c > @@ -51,7 +51,7 @@ static void qcom_adreno_smmu_get_fault_info(const void *cookie, > info->fsynr1 = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_FSYNR1); > info->far = arm_smmu_cb_readq(smmu, cfg->cbndx, ARM_SMMU_CB_FAR); > info->cbfrsynra = arm_smmu_gr1_read(smmu, ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); > - info->ttbr0 = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_TTBR0); > + info->ttbr0 = arm_smmu_cb_readq(smmu, cfg->cbndx, ARM_SMMU_CB_TTBR0); > info->contextidr = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_CONTEXTIDR); > } > > -- > 2.31.1 >
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