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SubjectRe: [PATCH 1/7] net: dsa: b53: Add BroadSync HD register definitions
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On 11/4/2021 6:31 AM, Martin Kaistra wrote:
> From: Kurt Kanzenbach <kurt@linutronix.de>
>
> Add register definitions for the BroadSync HD features of
> BCM53128. These will be used to enable PTP support.
>
> Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
> Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
> ---
> drivers/net/dsa/b53/b53_regs.h | 38 ++++++++++++++++++++++++++++++++++
> 1 file changed, 38 insertions(+)
>
> diff --git a/drivers/net/dsa/b53/b53_regs.h b/drivers/net/dsa/b53/b53_regs.h
> index b2c539a42154..c8a9d633f78b 100644
> --- a/drivers/net/dsa/b53/b53_regs.h
> +++ b/drivers/net/dsa/b53/b53_regs.h
> @@ -50,6 +50,12 @@
> /* Jumbo Frame Registers */
> #define B53_JUMBO_PAGE 0x40
>
> +/* BroadSync HD Register Page */
> +#define B53_BROADSYNC_PAGE 0x90
> +
> +/* Traffic Remarking Register Page */
> +#define B53_TRAFFICREMARKING_PAGE 0x91
> +
> /* EEE Control Registers Page */
> #define B53_EEE_PAGE 0x92
>
> @@ -479,6 +485,38 @@
> #define JMS_MIN_SIZE 1518
> #define JMS_MAX_SIZE 9724
>
> +/*************************************************************************
> + * BroadSync HD Page Registers
> + *************************************************************************/
> +
> +#define B53_BROADSYNC_EN_CTRL1 0x00
> +#define B53_BROADSYNC_EN_CTRL2 0x01

This is a single register which is 16-bit wide, can you also add a
comment to that extent like what is done for other register definitions?

> +#define B53_BROADSYNC_TS_REPORT_CTRL 0x02
> +#define B53_BROADSYNC_PCP_CTRL 0x03
> +#define B53_BROADSYNC_MAX_SDU 0x04


> +#define B53_BROADSYNC_TIMEBASE1 0x10

Single register which is 32-bit wide, no need to define the
TIMEBASE1..4, just call it timebase.

> +#define B53_BROADSYNC_TIMEBASE2 0x11
> +#define B53_BROADSYNC_TIMEBASE3 0x12
> +#define B53_BROADSYNC_TIMEBASE4 0x13
> +#define B53_BROADSYNC_TIMEBASE_ADJ1 0x14

Likewise.

> +#define B53_BROADSYNC_TIMEBASE_ADJ2 0x15
> +#define B53_BROADSYNC_TIMEBASE_ADJ3 0x16
> +#define B53_BROADSYNC_TIMEBASE_ADJ4 0x17
> +#define B53_BROADSYNC_SLOT_CNT1 0x18
> +#define B53_BROADSYNC_SLOT_CNT2 0x19
> +#define B53_BROADSYNC_SLOT_CNT3 0x1a > +#define B53_BROADSYNC_SLOT_CNT4 0x1b

Likewise, 32-bit register.

> +#define B53_BROADSYNC_SLOT_ADJ1 0x1c
> +#define B53_BROADSYNC_SLOT_ADJ2 0x1d
> +#define B53_BROADSYNC_SLOT_ADJ3 0x1e
> +#define B53_BROADSYNC_SLOT_ADJ4 0x1f

And likewise

> +#define B53_BROADSYNC_CLS5_BW_CTRL 0x30
> +#define B53_BROADSYNC_CLS4_BW_CTRL 0x60
> +#define B53_BROADSYNC_EGRESS_TS 0x90
> +#define B53_BROADSYNC_EGRESS_TS_STS 0xd0
> +#define B53_BROADSYNC_LINK_STS1 0xe0
> +#define B53_BROADSYNC_LINK_STS2 0xe1

Likewise this is a 16-bit register.
> +
> /*************************************************************************
> * EEE Configuration Page Registers
> *************************************************************************/
>

--
Florian

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