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    SubjectRe: [PATCH V4 1/2] dt-bindings: riscv: add MMU Standard Extensions support for Svpbmt
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    On 30 Nov 2021, at 12:07, Heiko Stübner <heiko@sntech.de> wrote:
    >
    > Am Montag, 29. November 2021, 13:06:23 CET schrieb Heiko Stübner:
    >> Am Montag, 29. November 2021, 09:54:39 CET schrieb Heinrich Schuchardt:
    >>> On 11/29/21 02:40, wefu@redhat.com wrote:
    >>>> From: Wei Fu <wefu@redhat.com>
    >>>>
    >>>> Previous patch has added svpbmt in arch/riscv and add "riscv,svpmbt"
    >>>> in the DT mmu node. Update dt-bindings related property here.
    >>>>
    >>>> Signed-off-by: Wei Fu <wefu@redhat.com>
    >>>> Co-developed-by: Guo Ren <guoren@kernel.org>
    >>>> Signed-off-by: Guo Ren <guoren@kernel.org>
    >>>> Cc: Anup Patel <anup@brainfault.org>
    >>>> Cc: Palmer Dabbelt <palmer@dabbelt.com>
    >>>> Cc: Rob Herring <robh+dt@kernel.org>
    >>>> ---
    >>>> Documentation/devicetree/bindings/riscv/cpus.yaml | 10 ++++++++++
    >>>> 1 file changed, 10 insertions(+)
    >>>>
    >>>> diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
    >>>> index aa5fb64d57eb..9ff9cbdd8a85 100644
    >>>> --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
    >>>> +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
    >>>> @@ -63,6 +63,16 @@ properties:
    >>>> - riscv,sv48
    >>>> - riscv,none
    >>>>
    >>>> + mmu:
    >>>
    >>> Shouldn't we keep the items be in alphabetic order, i.e. mmu before
    >>> mmu-type?
    >>>
    >>>> + description:
    >>>> + Describes the CPU's MMU Standard Extensions support.
    >>>> + These values originate from the RISC-V Privileged
    >>>> + Specification document, available from
    >>>> + https://riscv.org/specifications/
    >>>> + $ref: '/schemas/types.yaml#/definitions/string'
    >>>> + enum:
    >>>> + - riscv,svpmbt
    >>>
    >>> The privileged specification has multiple MMU related extensions:
    >>> Svnapot, Svpbmt, Svinval. Shall they all be modeled in this enum?
    >>
    >> I remember in some earlier version some way back there was the
    >> suggestion of using a sub-node instead and then adding boolean
    >> properties for the supported extensions.
    >>
    >> Aka something like
    >> mmu {
    >> riscv,svpbmt;
    >> };
    >
    > For the record, I'm talking about the mail from september
    > https://lore.kernel.org/linux-riscv/CAAeLtUChjjzG+P8yg45GLZMJy5UR2K5RRBoLFVZhtOaZ5pPtEA@mail.gmail.com/
    >
    > So having a sub-node would make adding future extensions
    > way nicer.

    Svpbmt is just an ISA extension, and should be treated like any other.
    Let’s not invent two different ways of representing that in the device
    tree.

    Jess

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